Synching threads with ISR

Wojtek Lerch wrote:


What other kind of guarantee would you expect?

It wouldn’t be a good idea for POSIX to make us promise you that your
thread will be woken up and actually get enough CPU to get to the first
opcode after the nanosleep() call exactly 1ms from after the first
opcode of nanosleep() was executed, would it?

I didn’t mean to imply that the Posix commitee should have done
something different. Of course it would be wonderful if one could have
a standard that did guarantee the above, but obviously it would not be
practical.

Rennie

Rennie Allen <rallen@csical.com> wrote:

Wojtek Lerch wrote:
It wouldn’t be a good idea for POSIX to make us promise you that your
thread will be woken up and actually get enough CPU to get to the first
opcode after the nanosleep() call exactly 1ms from after the first
opcode of nanosleep() was executed, would it?

I didn’t mean to imply that the Posix commitee should have done
something different. Of course it would be wonderful if one could have
a standard that did guarantee the above, but obviously it would not be
practical.

I don’t think it would be wonderful. It could only be implemented by
taking the CPU away from whatever thread is running at the moment,
without looking at priorities.


Wojtek Lerch QNX Software Systems Ltd.

Wojtek Lerch wrote:

Rennie Allen <> rallen@csical.com> > wrote:

Wojtek Lerch wrote:

It wouldn’t be a good idea for POSIX to make us promise you that your
thread will be woken up and actually get enough CPU to get to the first
opcode after the nanosleep() call exactly 1ms from after the first
opcode of nanosleep() was executed, would it?


I didn’t mean to imply that the Posix commitee should have done
something different. Of course it would be wonderful if one could have
a standard that did guarantee the above, but obviously it would not be
practical.


I don’t think it would be wonderful. It could only be implemented by
taking the CPU away from whatever thread is running at the moment,
without looking at priorities.

No, that’s not the only way it could be implemented, that is quite
likely the only way that it could be practically implemented.

It could be implemented by insisting (in the standard) that the
aggregate execution time of every schedulable entity (of higher
priority) that could possibly be scheduled under any circumstance, would
always be run to completion within the jitter interval allowed by the
standard. This would require the compliant vendor to be able to
synthesize a nearly infinite quantity of computation cycles on demand.
As I said, it is not practical, but if it could be done, it would most
definately be astonishing.

From www.dictionary.com:

won·der·ful Pronunciation Key (wndr-fl)
adj.

  1. Capable of eliciting wonder; astonishing.

Rennie

David Kuechenmeister wrote:

Mario,
Thanks for the quick answer. I still haven’t made the attitudinal shift
from working with a big kernel, as in vxWorks, to working with the
microkernel, here. In a big kernel, there is no overhead in sending a
message, releasing a semaphore, etc… as long as you don’t block. But, I’m
not using one of those RTOSs, so I’ll try to make the best of what we have.

Your comment about using timers was interesting, but I see a problem. Say
I have a high speed thread, 800Hz, for example. If I set the system clock to
a high rate, say 1000Hz, my resolution is still only 1/1000 sec, right?
That’s unacceptable for this thread. That is why I want to drive the threads
with a hardware timer that is based on a 10MHz clock. Now my timing jitter
is only 1/(10e6) sec. Much better. Can I connect the QNX software timers to
the hardware interrupt?

Yes … you can use the IRQ8. Let the the ISR send a pulse event to a
handler thread. This thread can do all what you want … sending
messages, pulse events … handling of semaphores and mutexes.

800 Hz is not an issue … our fieldbus resource managers e.g. are
working with a default time resolution of 1ms. The limiting factor
is only the power of your CPU.

Armin



If I can’t, the answer does seem to lie with the
InterruptAttachEvent() function.

Thanks again for the advice.

Regards,
David Kuechenmeister

“Mario Charest” <> goto@nothingness.com> > wrote in message
news:a923kc$4jt$> 1@inn.qnx.com> …

“David Kuechenmeister” <> david.kuechenmeister@viasat.com> > wrote in message
news:a922kc$qum$> 1@nntp.qnx.com> …
I’m trying to synchronize several threads, all in different processes
and
at
different rates, with an interrupt from a hardware timer. The ISR, much
to
my dismay, can’t send messages, release semaphores, or any of the other
non-blocking kernel calls that I am accustomed to using in vxWorks and
other
RTOSs. I need to unblock one or several of these threads, depending on
the
clock tick, i.e. the 100Hz thread runs each tick, the 50Hz on every
other,
the 20Hz every fifth tick, and so on. What I would like to do is send a
message to each thread that needs to unblock from the ISR.

It looks like all an ISR CAN do is return a sigevent destined for a
single
thread. It seems backwards to use the clock to interrupt the processor,
only
to require that the ISR unblock a scheduling thread to wake up the other
threads, but that is the way QNX appears to be leading me.

IMHO ISR are meant to be FAST (an furious), sending messages from inside
an ISR is a very bad idea (imagine if it would have to go over the
network),
the ISR would take forever. So is sending pulses to 100 threads for
example.


Is there a way to direct multiple pulses/events or whatever to the
threads
I
need to unblock, all while still in the ISR?

No.

If your events are based on the timer interrupt why don’t you just used
timers?

Other solution is to not use ISR but rather InterruptAttachEvent(). Then
your handler (which isn’t running in an ISR context) is free to do what
ever it wants (barrier, mutext, semaphore, etc ) to unblock the threads.


Thanks,
David Kuechenmeister
mailto:> david.kuechenmeister@viasat.com


\

Rennie Allen <rallen@csical.com> wrote:

Wojtek Lerch wrote:
Rennie Allen <> rallen@csical.com> > wrote:
Wojtek Lerch wrote:

It wouldn’t be a good idea for POSIX to make us promise you that your
thread will be woken up and actually get enough CPU to get to the first
opcode after the nanosleep() call exactly 1ms from after the first
opcode of nanosleep() was executed, would it?

I didn’t mean to imply that the Posix commitee should have done
something different. Of course it would be wonderful if one could have
a standard that did guarantee the above, but obviously it would not be
practical.

I don’t think it would be wonderful. It could only be implemented by
taking the CPU away from whatever thread is running at the moment,
without looking at priorities.



No, that’s not the only way it could be implemented, that is quite
likely the only way that it could be practically implemented.

It could be implemented by insisting (in the standard) that the
aggregate execution time of every schedulable entity (of higher
priority) that could possibly be scheduled under any circumstance, would
always be run to completion within the jitter interval allowed by the
standard. This would require the compliant vendor to be able to

Um… I don’t think the hypotetical guarantee we’re talking about
allows any jitter. At least I didn’t mean for it to allow any jitter.
That’s why I said “exactly 1ms”.

synthesize a nearly infinite quantity of computation cycles on demand.
As I said, it is not practical, but if it could be done, it would most
definately be astonishing.

One mistake I have to admit to: when I said “it could only be
implemented”, I didn’t think of the possiblility of implementing it on
“wonderful” hardware. I was thinking about realistic hardware.

Still, I don’t think it would be “wondwrful” if POSIX required
“wonderful” hardware. A standard that cannot be practically implemented
is useless.


Wojtek Lerch QNX Software Systems Ltd.

“Wojtek Lerch” <wojtek_l@yahoo.ca> wrote in message
news:a96sip$fii$1@nntp.qnx.com

Still, I don’t think it would be “wondwrful” if POSIX required
“wonderful” hardware. A standard that cannot be practically implemented
is useless.

“The best thing about ‘Standards’ is that there are so many different ones
to choose from!”

Wojtek Lerch wrote:


Um… I don’t think the hypotetical guarantee we’re talking about
allows any jitter. At least I didn’t mean for it to allow any jitter.
That’s why I said “exactly 1ms”.

Jitter == 0 is a possible jitter specification.

One mistake I have to admit to: when I said “it could only be
implemented”, I didn’t think of the possiblility of implementing it on
“wonderful” hardware. I was thinking about realistic hardware.

A hypothetical standard, is free to include hardware :slight_smile:


Rennie

Previously, Rennie Allen wrote in comp.os.qnx:

Wojtek Lerch wrote:


Um… I don’t think the hypotetical guarantee we’re talking about
allows any jitter. At least I didn’t mean for it to allow any jitter.
That’s why I said “exactly 1ms”.


Jitter == 0 is a possible jitter specification.

What are the tolerances on that zero? :wink:


Mitchell Schoenbrun --------- maschoen@pobox.com

Rennie Allen <rallen@csical.com> wrote:

Wojtek Lerch wrote:

Um… I don’t think the hypotetical guarantee we’re talking about
allows any jitter. At least I didn’t mean for it to allow any jitter.
That’s why I said “exactly 1ms”.

Jitter == 0 is a possible jitter specification.

Money == 0 is a possible money specification.

Hey, I have money! :slight_smile:

One mistake I have to admit to: when I said “it could only be
implemented”, I didn’t think of the possiblility of implementing it on
“wonderful” hardware. I was thinking about realistic hardware.

A hypothetical standard, is free to include hardware > :slight_smile:

Sure. Whatever. I still don’t see why you think it would be wonderful
to have a standard like that – personally, I wouldn’t give a damn.


Wojtek Lerch QNX Software Systems Ltd.

Wojtek Lerch wrote:


Money == 0 is a possible money specification.

Hey, I have money! > :slight_smile:

Money ==

Hey, I have money too :slight_smile:

“Rennie Allen” <rallen@csical.com> wrote in message
news:3CBD92DA.8040608@csical.com

Wojtek Lerch wrote:


Money == 0 is a possible money specification.

Hey, I have money! > :slight_smile:

Money == <some big negative number

Hey, I have money too > :slight_smile:

…and if you decrement this counter high enough finally you’ll get a
positive value :slight_smile:

// wbr

Not true. I’ve been going into debt for years and I’m still not rich.

“Ian Zagorskih” <ianzag@mail.ru> wrote in message
news:a9ljfm$7lp$1@inn.qnx.com

…and if you decrement this counter high enough finally you’ll get a
positive value > :slight_smile:

“Bill Caroselli (Q-TPS)” <QTPS@EarthLink.net> wrote in message
news:a9mv12$ah6$1@inn.qnx.com

Not true. I’ve been going into debt for years and I’m still not rich.

“Ian Zagorskih” <> ianzag@mail.ru> > wrote in message
news:a9ljfm$7lp$> 1@inn.qnx.com> …

…and if you decrement this counter high enough finally you’ll get a
positive value > :slight_smile:

…it means only that you’r counter’s bit length is too high :slight_smile:

// wbr