Armin Steinhoff <a-steinhoff@web.de> wrote:
David Gibbs wrote:
It isn’t a process flag, as in QNX4, it is a channel flag.
OK … I mean ‘pidin fl’ → it returns also the process flags.
(may be there is a break in the terminology …)
It isn’t a process flag.
A process can have 2 channels. One channel has the default, one
has set _NTO_CHF_FLAG_FIXED_PRIORITY. 3 threads blocked on the
first channel will float, 2 threads blocked on the 2nd channel
will not float. What could a process flag say for something like
that?
It isn’t a process level setting, so it can’t be reflected in
a process level flag.
You do have a point, though, that the docs to pidin don’t describe
the meaning of the flags output. I expect there are a number
of output modes for pidin that are not completely documented, and
probably should be.
Check docs for ChannelCreate() and _NTO_CHF_PRIORITY_FIXED is, I think,
the flag to disable this behaviour.
So if _NTO_CHF_PRIORITY_FIXED is used … is it listed in the so called
‘process flags’ returned by ‘pidin fl’ ??
No. It isn’t. It isn’t a PROCESS flag, it is a channel flag.
Note: most embedded and realtime systems do not have an environment
where people can compile or run arbitrary programs.
Not arbitrary programms … but which program is running when is event
driven and therefor arbitrary.
Not entirely arbitrary, but yes it is a system design issue.
Two main choices here:
– hw thread uses InterruptWait(), runs at high priority, doesn’t receive
messages, so never floats in priority
– isr/event delivered is a pulse, with a high priority (pulses also carry
priority information) then the thread receiving the hardware pulse will
float to the (high) priority specified in the pulse
What happens if the message handler of the main thread of a resource
manager isn’t able to send received data to the hardware interface
because of the low priority of the requestor? Who will be blamed for
the malfunction? The resource manager? The hardware? (Floppy …)
The system designer.
Seriously. If you have designed your system such that somebody
supplying data for hardware – saying the next block you want to
write to a disk – and that person hasn’t gotten enough CPU to
send it to your resource manager, due to being pre-empted by other
things, then when you designed your system, and decided the priority
of things, you didn’t give it a high enough priority. Or, this
“failure” is not a failure, but a normal case… the hardware will
wait/the block won’t be written until the next block is available. Sure,
you might get a lag, lowered throughput to your hard drive due to not
having another block to DMA when you got the DMA completed irq, but
is this a failure of any of the pieces? Or just a normal state.
IMHO, what we also need are design rules for user level processes in
order to make sure that these processes can’t pe-empt interrupt threads.
(layered priority schemes …)
That sort of consideration is a good one to undertake when designing
a system, yes.
-David
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