Interesting benchmark results - Comments?

I’m designing a system that uses a Resouce Manager style routine to
implement a data store. Multiple processes access the data - either writing
or reading.

As a benchmark, I torque up the reads/writes per second until it consumes
100% of the CPU.
This is using RTP w/patch B.

The benchmark results on 3 different systems are:

  1. Mobile Celeron - 650 MHz - 64 MB
    ~42,000 r/w per seconds
  2. AMD K6-2 - 450 MHz - 128 MB
    ~15,000 r/w per seconds
  3. Cyrix 486SLC2 w/MathCo - 50 MHz - 16 MB
    ~300 r/w per seconds

Seems like thruput drops off like a rock with earlier CPU’s.

Comments?

Ed Theobald
Revis & Associates
edtheobald@starband.net

“Ed Theobald” <edtheobald@starband.net> wrote in message
news:9hdck2$70b$1@inn.qnx.com

I’m designing a system that uses a Resouce Manager style routine to
implement a data store. Multiple processes access the data - either
writing
or reading.

As a benchmark, I torque up the reads/writes per second until it consumes
100% of the CPU.
This is using RTP w/patch B.

The benchmark results on 3 different systems are:

  1. Mobile Celeron - 650 MHz - 64 MB
    ~42,000 r/w per seconds
  2. AMD K6-2 - 450 MHz - 128 MB
    ~15,000 r/w per seconds
  3. Cyrix 486SLC2 w/MathCo - 50 MHz - 16 MB
    ~300 r/w per seconds

Seems like thruput drops off like a rock with earlier CPU’s.

I’m pretty sure it’s related to cache size. If possible try to increase
the read/write block size to something like 1Meg to reduce
cache effect.

What are you block size at the moment. I would expect
more then 300 r/w sec for a 486SLC 50Mzh, unless you
are already sending big blocks.

Bytes/sec would be more meaninfg full the r/w per sec.


Comments?

Ed Theobald
Revis & Associates
edtheobald@starband.net

Each read or write transfers 40 bytes of data. This is an atom of info in
this design and thus would not make sense to change - given the intent of
the design.

Based on clock speed alone, the throughtput for the 486 vs K6-2 would be
1500 r/w per minute (for 486). At 300 r/w per sec, it looks like I’m getting
a 1/5 hit for 486 vs K6-2 - independant of clock speed.

Perhaps I’ll look for processor optimization option to gcc? (The code that
was run on the 3 machines was identical and was built on the 450 MHz K6-2).

Ed Theobald
Revis & Associates
edtheobald@starband.net

“Mario Charest” <mcharest@zinformatic.com> wrote in message
news:9hdd8g$7b1$1@inn.qnx.com

“Ed Theobald” <> edtheobald@starband.net> > wrote in message
news:9hdck2$70b$> 1@inn.qnx.com> …
I’m designing a system that uses a Resouce Manager style routine to
implement a data store. Multiple processes access the data - either
writing
or reading.

As a benchmark, I torque up the reads/writes per second until it
consumes
100% of the CPU.
This is using RTP w/patch B.

The benchmark results on 3 different systems are:

  1. Mobile Celeron - 650 MHz - 64 MB
    ~42,000 r/w per seconds
  2. AMD K6-2 - 450 MHz - 128 MB
    ~15,000 r/w per seconds
  3. Cyrix 486SLC2 w/MathCo - 50 MHz - 16 MB
    ~300 r/w per seconds

Seems like thruput drops off like a rock with earlier CPU’s.

I’m pretty sure it’s related to cache size. If possible try to increase
the read/write block size to something like 1Meg to reduce
cache effect.

What are you block size at the moment. I would expect
more then 300 r/w sec for a 486SLC 50Mzh, unless you
are already sending big blocks.

Bytes/sec would be more meaninfg full the r/w per sec.



Comments?

Ed Theobald
Revis & Associates
edtheobald@starband.net

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