There was a thread along these lines a few months ago. I have a few more questions assuming x86:
1.) There was some question about the default priority chain, highest to lowest. One post said it
was 3,4,5,6,7,0,1,2,8,9,10,11,12,13,14,15, with level 3 the highest. Would someone please verify
2.) 4.25 had a ‘-i’ flag to ‘Proc’ that enabled one to set which IRQ had the highest priority and
the chain. RTP so far doesnt have a way to do this. Is this correct?
3.) Assume that I am currently executing an ISR from an interrupt on level 5. Assume level 3 has a
priority and level 7 has a lower. Assume I havent masked or disabled any interrupts in my ISR.
a single processor.
a.) If while in my ISR an interrupt comes on level 3 would my ISR be preempted?
b.) If while in my ISR an interrupt comes on level 7 would my ISR be preempted?
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