Does “PROT_NOCACHE” specify to QNX to access the mapped memory directly from
the
physical memory devices and bypass the L1 & L2 caches nominally found on
most Pentium boards?
“Bill Shadid” <bshadid@neptec.com> wrote in message
news:adod8g$hur$1@inn.qnx.com…
Does “PROT_NOCACHE” specify to QNX to access the mapped memory directly
from
the physical memory devices and bypass the L1 & L2 caches nominally found
on
most Pentium boards?
Yes. That is required when dealing with the hardware.