Hardware watchdogs

[kwschumm]

@rgallen

I know that there are PXA variants with a cycle counter (it is one of the performance counter registers), but I don’t know enough to know exactly which ones…

I’ve played with those. The pxa270 does not actually have a cycle counter in those registers, the closest thing it can do is the number of instructions executed. Since that varies based on instruction (varies from 5 to 11 cycles/instruction) and on stalls due to cache misses it doesn’t seem all that helpful.

As an aside, the performance monitoring unit seems sort of flakey anyway. It reports weird numbers like 48.2% wasted cycles due to instruction fetch stalls while simultaneously reporting a 0.4% instruction cache miss rate.

[rgallen]

@kwschumm

@rgallen

I know that there are PXA variants with a cycle counter (it is one of the performance counter registers), but I don’t know enough to know exactly which ones…

I’ve played with those. The pxa270 does not actually have a cycle counter in those registers, the closest thing it can do is the number of instructions executed. Since that varies based on instruction (varies from 5 to 11 cycles/instruction) and on stalls due to cache misses it doesn’t seem all that helpful.

As an aside, the performance monitoring unit seems sort of flakey anyway. It reports weird numbers like 48.2% wasted cycles due to instruction fetch stalls while simultaneously reporting a 0.4% instruction cache miss rate.

Ahhh, it doesn’t work OK… I guess you’d be stuck with emulation then. This means you might want to increase the tick size to (say) 10ms, in order to reduce the overhead.