紧急求助,关于中断的问题

个位高手,大家好,现在我的中断程序总是休克,不知何故,敬请指点。
我采用的凌华公司的9116采集卡,通过外部触发数据采集,采用DMA模式,中断服务程序进行数据处理。采样频率为1600Hz,正常情况下应该平均0.666ms中断一次,可我的程序在大部分的时间里,是这个时间间隔,偶尔(时间不定)就出现一次41ms中断一次,不规律,我发现采集卡是和网卡占用同一个中断,将9116换了槽位后,又出现死机现象,不是启动立即死机,而是运行一回儿,死机。以下是我的程序片断:
int PmuStartWork()
{ int_PmuWork = 1;

if(_Sys_Initial()!=NoError)
{
printf("\n No cPCI card found!!");
exit(1);
}
Start_9116_Card();
}


int Start_9116_Card()
{
I16 status;
int err, index,i;
int card_number=0;

U16 dma_count;
// total transfered data = SC_value * DIV_value =100 samples
// SI2_value = pmuconfig.SI2_counter; //set samples
DIV_value = 32;//pmuconfig.DIV_counter;//pmuconfig.DIV_counter;
dma_count = SC_value * DIV_value;

/---------- Memory boundary adjusting ---------------------------/
irqBuf9116 = (unsigned long )mmap(0, dma_count * sizeof(unsigned long), PROT_READ|PROT_WRITE|PROT_NOCACHE, MAP_PHYS|MAP_ANON, NOFD, 0);
bzero(irqBuf9116,dma_count * sizeof(unsigned long));
/
---------- PCI-9116 initial ------------------------------------------/
if( _9116_Initial(card_number)!= NoError)
{
printf("\n No cPCI-9116 card found!!");
return(1);
}
_9116_AD_Trig_Ctrl(0, 0,1,0,0,0,0,0,0); // post trigger
_9116_AD_Clr_DFIFO(card_number); // reset DFIFO
_9116_AD_Clr_CFIFO(card_number); // reset CFIFO
for (i=0; i<32; i++)//pmuconfig.DIV_counter
{
_9116_AD_Set_CFIFO(card_number, i, AD_B_5_V, 1, 0); // Select Channel all and gain = 1,diffrent
}
_9116_AD_CFIFO_SetDone(card_number);
delay(1); // the start of A/D conversion should be at least 10us after CFIFO setdone to let AD Mux settle.
SI_value=SI2_value
DIV_value; // SI_value must >= SI2_value*DIV_value
_9116_AD_Int_Ctrl(0,0x081F);
_9116_DO(0,0x00);
if( (err=_9116_AD_DMA_Start(card_number, SI_value, SI2_value, SC_value, DIV_value, irqBuf9116))!= NoError)
{
printf(“9116 AD Setup Error.”);
return 1;
}
}

I16 _9116_AD_DMA_Start(I16 card_number, U32 SI_value, U32 SI2_value, U32 SC_value, U32 DIV_value, U32 *ad_buffer)
{
U8 irq_no;
U32 dma_count;
off_t DMA_dest0;
U8 trig_mode;
U32 M_value;
U32 int_ctrl_value;

M_value = card_array[card_number].M_value;

if ((card_number<0) || (card_number>=PCI_MAXCARDS))
return(PCICardNumErr);
if (card_array[card_number].initialized == FALSE)
return(PCICardNotInit);

if ( SI_value < 96 || SI_value < SI2_value * DIV_value )
return InvalidSIValue;
if ( SI2_value < 96 )
return InvalidSI2Value ;
if ( DIV_value < 1 || DIV_value > 512)
return InvalidDIVValue;
if ( (SC_value < 1) && (card_array[card_number].trig_mode != PRE_TRIG) || (SC_value+M_value) > 0x01000000 )
return InvalidSCValue;
if ( DIV_value < 256 && DIV_value*(SC_value+M_value) > 0x02000000)
return OverSizeDMA;
if ( DIV_value > 256 && (SC_value+M_value) > 0x00040000)
return OverSizeDMA;

if ( DIV_value > 256 && (SC_value+M_value) < 0x00040001 && DIV_value * (SC_value+M_value) > 0x02000000)
return OverSizeDMA;

if (card_array[card_number].retrig_en != 0)
dma_count = 2 * DIV_value * SC_value * card_array[card_number].retrig_no;
else
dma_count = 2 * DIV_value * SC_value;
mem_offset(ad_buffer, NOFD, dma_count * sizeof(unsigned long), &DMA_dest0, NULL);


/* user buffer must add 2 double word for boundary adjusting */
if((DMA_dest0 & 0x00000003) != 0)
return MemNotAligned;

card_array[card_number].SI_value = SI_value;
card_array[card_number].SI2_value = SI2_value;
card_array[card_number].DIV_value = DIV_value;

if(card_array[card_number].trig_mode == PRE_TRIG)
SC_value = 0;
card_array[card_number].SC_value = SC_value;

/----------------------------------------------------------------------/
/* DMA Function Setup /
/
Keep Card n DMA Number /
/
----------------------------------------------------------------------*/
card_array[card_number].intrrupt_work = 1;
SIGEV_INTR_INIT(&event );
//pthread_create (NULL, NULL,cPCI_ISR_0, NULL);
pthread_create (&thread0.FThreadID, NULL,cPCI_ISR_0, NULL);
irq_no = card_array[card_number].irq;

InterruptEnable();
flag=1;

_9116_DMA_Initial(card_number);

/---- Timer Setup --------------------------------------------------------/
_9116_AD_Set_SI(card_number, SI_value );
_9116_AD_Set_SI2(card_number, SI2_value );
_9116_AD_Set_SC(card_number, SC_value );
_9116_AD_Set_DIV(card_number, DIV_value );

trig_mode = card_array[card_number].trig_mode;

if ((trig_mode == PRE_TRIG) || (trig_mode == MN_TRIG))
{
dma_count = 2 * DIV_value * (SC_value + M_value);

card_array[card_number].SCTC_int_en = 1;
int_ctrl_value = (card_array[card_number].EOC_int_en << :sunglasses:
|(card_array[card_number].DTRG_int_en << 9)
|(card_array[card_number].HFULL_int_en << 10)
|(card_array[card_number].SCTC_int_en << 11)
|(card_array[card_number].GPTC_int_en << 12
|0x0800);
_9116_AD_Int_Ctrl(card_number, int_ctrl_value);
out32(card_array[card_number].op_base_addr+AMCC_OP_REG_INTCSR,
in32(card_array[card_number].op_base_addr+AMCC_OP_REG_INTCSR)| EN_IMB_INT | IMB4 | IMB_BYTE3);
}
else
{
if (card_array[card_number].retrig_en != 0)
dma_count = 2 * DIV_value * SC_value * card_array[card_number].retrig_no;
else
dma_count = 2 * DIV_value * SC_value;
}

card_array[card_number].ad_buffer0 = ad_buffer;
card_array[card_number].DMA_dest0 = DMA_dest0;

card_array[card_number].dmaByteCount = dma_count;
card_array[card_number].ad_txf_cnt = 0;
card_array[card_number].DMA_OK_Flag = FALSE;
card_array[card_number].start_index = 0;

if (card_array[card_number].ad_dblbuf==TRUE)
{
if((trig_mode == PRE_TRIG) || (trig_mode == MN_TRIG))
return DblBufrModeNotAllowed;

card_array[card_number].ad_buffer1 = &ad_buffer[dma_count/2];
card_array[card_number].DMA_dest1 = (U32)(*card_array[card_number].ad_buffer1)*16
+(U32)(*card_array[card_number].ad_buffer1);
card_array[card_number].dmaByteCount = dma_count;
card_array[card_number].ad_1st_half = TRUE;
card_array[card_number].ad_half_rdy = FALSE;
card_array[card_number].ad_dblbuf_overrun_cnt = 0;
card_array[card_number].next_to_txf = 0;
_9116_AD_SC_disable(card_number, 1);
}

card_array[card_number].ad_dma_done_cnt = 0;

out32(card_array[card_number].op_base_addr+AMCC_OP_REG_MWAR, DMA_dest0);
out32(card_array[card_number].op_base_addr+AMCC_OP_REG_MWTC, dma_count);

card_array[card_number].DMASet = TRUE;

/* enable DMA transfer */
out32(card_array[card_number].op_base_addr+AMCC_OP_REG_MCSR,
in32(card_array[card_number].op_base_addr+AMCC_OP_REG_MCSR)| EN_A2P_TRANSFERS);

card_array[card_number].acq_en = TRUE;

_9116_AD_DMA_EN(card_number, 1 );
_9116_AD_Set_ACQ(card_number, ACQ_EN);

return NoError;
}

I16 _9116_AD_DMA_ReStart(I16 card_number)
{ I16 status,currentCount,start_idx;
U32 dma_count;
U8 trig_mode;
U32 M_value;
U32 int_ctrl_value;
U32 SI_value, SI2_value,SC_value, DIV_value;
//stop the DMA operation modify by mxl 2005-1-27



// _9116_AD_Set_ACQ(0, 0);

// card_array[0].DMA_OK_Flag = FALSE;
// card_array[0].acq_en = FALSE;

// _9116_AD_Trig_Ctrl(0, 0,1,0,0,0,0,0,0);
/* _9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0008);

*/

M_value = card_array[card_number].M_value;
SI_value = card_array[card_number].SI_value ;
SI2_value = card_array[card_number].SI2_value;
DIV_value = card_array[card_number].DIV_value ;

SC_value =card_array[card_number].SC_value ;

/----------------------------------------------------------------------/
/* DMA Function Setup /
/
Keep Card n DMA Number /
/
----------------------------------------------------------------------*/
// flag=1;
// _9116_DMA_Initial(card_number);

/---- Timer Setup --------------------------------------------------------/
if (_9116_AD_Set_SI(card_number, SI_value )!=NoError)
printf(“Set SI error!\n”);
if (_9116_AD_Set_SI2(card_number, SI2_value )!=NoError)
printf(“Set SI2 error!\n”);
if (_9116_AD_Set_SC(card_number, SC_value )!=NoError)
printf(“Set SC error!\n”);
if (_9116_AD_Set_DIV(card_number, DIV_value )!=NoError)
printf(“Set DIV error !\n”);

card_array[card_number].ad_txf_cnt = 0;
card_array[card_number].DMA_OK_Flag = FALSE;
card_array[card_number].start_index = 0;

card_array[card_number].ad_dma_done_cnt = 0;

out32(card_array[card_number].op_base_addr+AMCC_OP_REG_MWAR,card_array[card_number].DMA_dest0);
out32(card_array[card_number].op_base_addr+AMCC_OP_REG_MWTC, card_array[card_number].dmaByteCount);
// printf(“count of DMA:%d\n”,currentCount);
card_array[card_number].DMASet = TRUE;
/* enable DMA transfer */
out32(card_array[card_number].op_base_addr+AMCC_OP_REG_MCSR,in32(card_array[card_number].op_base_addr+AMCC_OP_REG_MCSR)| EN_A2P_TRANSFERS);

card_array[card_number].acq_en = TRUE;

if (_9116_AD_DMA_EN(card_number, 1 )!=NoError)
printf(“DMA enable error!\n”);
if (_9116_AD_Set_ACQ(card_number, ACQ_EN)!=NoError)
printf(“Set ACQ error!\n”);

return NoError;
}


const struct sigevent *handler0(void *arg, int id)
{
U32 int_status, master_status, DmaSampleCount;
U32 overrun = 0, left_cnt;
U32 *dest;
U16 half_count;
U32 i;
U16 op_base_addr, pt_base_addr;
U32 temp;
op_base_addr = card_array[0].op_base_addr;
pt_base_addr = card_array[0].pt_base_addr;

out32(pt_base_addr+INT_GEN_ADD,0);

int_status = in32(op_base_addr+AMCC_OP_REG_INTCSR);
master_status = in32(op_base_addr+AMCC_OP_REG_MCSR);

if ((int_status & ANY_S593X_INT) != 0)
{
if (((int_status & IMB_INT) != 0) && (card_array[0].INT_en == 1))
{
/* /
/
AD_MODE set to interrupt or Pretrigger, Middle trigger ends /
/
/
/
Read IMB4 to clear MBEF flag /
in32(op_base_addr+AMCC_OP_REG_IMB4);
/
Clear incoming mailbox interrupt */

out32(op_base_addr+AMCC_OP_REG_INTCSR,
(int_status|0x00820000L));

/* check if tx mode is EOC */
if (((in32(pt_base_addr+INT_CSR_ADD) & 0x0001) != 0) && card_array[0].INTSet == 1)
{
if ((in32(pt_base_addr+AD_FIFO_CSR_ADD) & 0x0002) != 0)
overrun++;

if( card_array[0].ad_txf_cnt < card_array[0].AD_INT_Count )
{
*(card_array[0].AD_INT_Buf+card_array[0].ad_txf_cnt) =
(U16)(0x0000FFFF & in32(pt_base_addr+AD_DATA_ADD));

_9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0001);
/* clear the interrupt flag */

card_array[0].ad_txf_cnt++;
if( card_array[0].ad_txf_cnt == card_array[0].AD_INT_Count )
{
card_array[0].EOC_int_en = 0;
_9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0001);
// card_array[0].AD_INT_Status = AD_INT_STOP;
// _9116_AD_Trig_Ctrl(0, 0, 0, 0, 0, 0, 0, 0, 0); /* software trigger /
}
}
else
{
card_array[0].EOC_int_en = 0;
_9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0001);
// card_array[0].AD_INT_Status = AD_INT_STOP;
// _9116_AD_Trig_Ctrl(0, 0, 0, 0, 0, 0, 0, 0, 0); /
software trigger */
}
}

/* check if the tx mode is half-full interrupt */
if (((in32(pt_base_addr+INT_CSR_ADD) & 0x0004) != 0) && (card_array[0].INTSet == 1))
{
if ((in32(pt_base_addr+AD_FIFO_CSR_ADD) & 0x0002) != 0)
overrun++;

if((card_array[0].AD_INT_Count - card_array[0].ad_txf_cnt) >= 512)
{
half_count = 512;
for ( i=0;i<half_count;i++)
{
*(card_array[0].AD_INT_Buf+card_array[0].ad_txf_cnt) =
(U16)(0x0000FFFF & in32(pt_base_addr+AD_DATA_ADD));
card_array[0].ad_txf_cnt++;
}
_9116_AD_Int_Ctrl(0,(card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0004);
if((card_array[0].AD_INT_Count - card_array[0].ad_txf_cnt) < 512)
{
card_array[0].HFULL_int_en = 0;
_9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0004);
}
}
}

/* check if interrup is generated by Scan Counter /
if ((in32(pt_base_addr+INT_CSR_ADD) & 0x0008) != 0)
{
/
check if tx mode is interrupt transfer */
if (card_array[0].INTSet == 1)
{
half_count = card_array[0].AD_INT_Count - card_array[0].ad_txf_cnt;
for ( i=0;i<half_count;i++)
{
*(card_array[0].AD_INT_Buf+card_array[0].ad_txf_cnt) =
(U16)(0x0000FFFF & in32(pt_base_addr+AD_DATA_ADD));
card_array[0].ad_txf_cnt++;
}
_9116_AD_Set_ACQ(0, 0);

card_array[0].SCTC_int_en = 0;

_9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0008);

// card_array[0].AD_INT_Status = AD_INT_STOP;
// _9116_AD_Trig_Ctrl(0, 0, 0, 0, 0, 0, 0, 0, 0); /* software trigger /
}
/
check if tx mode is DMA and trigger mode is pretrigger or mn_trigger */
else if((card_array[0].DMASet == 1) && ((card_array[0].trig_mode == PRE_TRIG) || (card_array[0].trig_mode == MN_TRIG)))
{
DmaSampleCount = card_array[0].dmaByteCount/2;
dest = card_array[0].ad_buffer0;

/* clear trigger detection bit */

/* stop AD DMA transfer */
master_status = master_status & 0xFFFFFBFFL;
out32(op_base_addr+AMCC_OP_REG_MCSR, master_status);

/* clear write terminal count interrupt flag if it was set */
out32(op_base_addr+AMCC_OP_REG_INTCSR, (int_status|0x00840000L));

int_status = int_status & 0xFFFBFFFFL;
left_cnt = in32(op_base_addr+AMCC_OP_REG_MWTC)/2;

/* move data in PCI controller internal FIFO to buffer */
for (i=0; i<12; i++) //there are at most 8 double words in fifo
{
// if fifo is empty then break
if ((in32(op_base_addr+AMCC_OP_REG_MCSR) & 0x00000020L) != 0) break;

// if left_cnt is 0 then one DMA transfer is completed
if ((left_cnt == 0) || (left_cnt > DmaSampleCount))
{
left_cnt = DmaSampleCount;
card_array[0].ad_dma_done_cnt++;
card_array[0].ad_txf_cnt = DmaSampleCount;
}
temp = in32(op_base_addr+AMCC_OP_REG_FIFO);
dest[((DmaSampleCount-left_cnt)%DmaSampleCount)/2] = temp;

//decrease left-cnt by 2, do not let left_cnt become negative!
left_cnt = left_cnt-2;
}

if ((in32(pt_base_addr + AD_FIFO_CSR_ADD) & 0x0100) != 0)
{
temp = (0xFFFF0000 & in32( pt_base_addr + AD_DATA_ADD )) >> 16;
dest[((DmaSampleCount-left_cnt)%DmaSampleCount)/2] = temp | (dest[((DmaSampleCount-left_cnt)%DmaSampleCount)/2] & 0xFFFF0000);
left_cnt = left_cnt-1;
}

card_array[0].start_index = (DmaSampleCount-left_cnt)%DmaSampleCount;

// if there is no specific M samples collected and trigger comes before the 1st DMA completes
if (card_array[0].ad_txf_cnt == 0)
{
card_array[0].ad_txf_cnt = card_array[0].dmaByteCount/2 - left_cnt;
card_array[0].start_index = 0;
}
card_array[0].SCTC_int_en = 0;

_9116_AD_Int_Ctrl(0, (card_array[0].EOC_int_en << :sunglasses:
| (card_array[0].DTRG_int_en << 9)
| (card_array[0].HFULL_int_en << 10)
| (card_array[0].SCTC_int_en << 11)
| (card_array[0].GPTC_int_en << 12)
| 0x0008);
_9116_AD_Set_ACQ(0, 0);
card_array[0].DMA_OK_Flag = TRUE;
}
}
}

if((int_status & WRITE_TC_INT) != 0)
{
// m-n & pre-trigger bug found by joey
out32(op_base_addr+AMCC_OP_REG_INTCSR, (int_status|0x00840000L));
/* Clear Write interrupt /
if (card_array[0].ad_dblbuf==TRUE)
{
if (card_array[0].ad_1st_half==TRUE)
{
out32(op_base_addr+AMCC_OP_REG_MWAR, card_array[0].DMA_dest1);
out32(op_base_addr+AMCC_OP_REG_MWTC, card_array[0].dmaByteCount);
card_array[0].ad_1st_half = FALSE;
card_array[0].next_to_txf = 0;
card_array[0].shit1 ++;
}
else
{
out32(op_base_addr+AMCC_OP_REG_MWAR, card_array[0].DMA_dest0);
out32(op_base_addr+AMCC_OP_REG_MWTC, card_array[0].dmaByteCount);
card_array[0].ad_1st_half = TRUE;
card_array[0].next_to_txf = 1;
card_array[0].shit2 ++;
}
if (card_array[0].ad_half_rdy==TRUE)
card_array[0].ad_dblbuf_overrun_cnt++;
else
card_array[0].ad_half_rdy = TRUE;
}
else if ((card_array[0].trig_mode == PRE_TRIG) || (card_array[0].trig_mode == MN_TRIG))
{
out32(op_base_addr+AMCC_OP_REG_MWAR, card_array[0].DMA_dest0);
out32(op_base_addr+AMCC_OP_REG_MWTC, card_array[0].dmaByteCount);
}
else
{
flag =1;
card_array[0].DMA_OK_Flag = TRUE;
out32(pt_base_addr+AD_TRIG_CSR_ADD,0);
/
disable write channel */
out32(op_base_addr+AMCC_OP_REG_MCSR, (master_status&0xFFFFFBFFL));
}
if ((in32(pt_base_addr + AD_FIFO_CSR_ADD) & 0x0002) != 0)
overrun++;
card_array[0].ad_dma_done_cnt++;
card_array[0].ad_txf_cnt = card_array[0].dmaByteCount/2;
}

if((int_status & READ_TC_INT) != 0)
{
/* Clear Read Interrupt and disable read channel /
out32(op_base_addr+AMCC_OP_REG_INTCSR, (int_status|0x00880000L));
out32(op_base_addr+AMCC_OP_REG_MCSR, (master_status&0xFFFFBFFFL));
/
Insert Read TC interrupt code here */
}

if((int_status & MASTER_ABORT_INT) != 0)
{
out32(op_base_addr+AMCC_OP_REG_INTCSR, (int_status|0x00900000L));
/* Insert Master Abort interrupt code here */
}

if((int_status & TARGET_ABORT_INT) != 0)
{
out32(op_base_addr+AMCC_OP_REG_INTCSR, (int_status|0x00A00000L));
/* Insert Target Abort interrupt code here /
}
}
else
{
/
Interrupt is not from the S5933, call the previous handler /
/
_chain_intr(card_array[0].old_isr);*/
flag =0;
}

out32(pt_base_addr+INT_GEN_ADD,1);
return (&event);

}

void cPCI_ISR_0 (void arg)
{
I16 status;
U16 intSta;
U32 currentCount,start_idx;
int irq_no,i,j,k;
struct timespec rqtp;
irq_no = card_array[0].irq;
rs = InterruptAttach (irq_no, handler0, NULL, 0, 0);
if (rs == -1)
printf (“IntConnect ERR %d \n”);
rqtp.tv_nsec = 10000;
while(1)
{
InterruptWait (NULL, NULL);
_9116_AD_Int_Sts(0,&intSta);
if ((intSta & 0x08)==8)
{
_9116_AD_ClrSts(0);
_9116_AD_Int_Ctrl(0,0x00FF);
do{
_9116_AD_DMA_Status (0, &status, &currentCount, &start_idx);

}while(status !=AD_DMA_STOP);

ReArrayThread(NULL);
_9116_AD_Int_Ctrl(0,0x08FF);
if( _9116_AD_DMA_ReStart(0)!=NoError)
printf(“9116 dma err!\n”);
// nanosleep(&rqtp,NULL);

}
flag = 0;
}
pthread_exit(0);
}


void ReArrayThread(voidarg) //sample data rearray thread
{
int i,j,mc;
char *p,*q,*tem;
U16 stat9116;
int err,Rearray_No;
FILE *fp;
I16 *irqBuf,Tsam;
uint64_t stop,cps;
pthread_t selfThread;
9116_DI(0,&stat9116);
curDIData.Digital9116 = (stat9116);
running9116 = 1; //正在运行
stop = ClockCycles();
cps=SYSPAGE_ENTRY(qtime)->cycles_per_sec;
if (((stop-start)*1000000.0/cps)>10000 || ((stop-start)*1000000.0/cps)<400)
printf(“9116 stop run of:%lf,%d\n”,((stop-start)*1000000.0/cps),CurSampPos);
start = stop;
run9116 = 0;
return;
run9116++;
Rearray_No = CurSampPos+1;
Rearray_No %=KeepSampleTimes;
irqBuf = (I16 *)irqBuf9116; // convert to 16 bit pointer
//transform sample data to sample’s buffer
7249_DI(card_number, PCI_CH0_PB, &Tsam);
//fwrite(&FREQ,4,1,fp);
if (Tsam>200) Tsam = Tsam - 250;
AllSampleBuf[1][Rearray_No] = Tsam;
// printf(“tsam:%d,%d\n”,Tsam,Rearray_No);
for (i=2 ;i<(pmuconfig.DIV_counter-2)*3+2;i++)
{
AllSampleBuf
[Rearray_No] = irqBuf++;//32767cos((CurSampPos % 32)*PI/16);//
}
// printf(“tsam:%d,%d\n”,Tsam,Rearray_No);
CurSampPos = Rearray_No ;
// printf(“tsam111:%d,%d\n”,Tsam,Rearray_No);
if (!S_Calculate)
S_Calculate=(CurSampPos>=32);//Start can Dft trans from this time
return;

}

可能是中断线程的优先级别低,抬高试试

如何提高中断线程的优先级?

建立线程时设定

线程采样什么调度算法,先进先出还是轮旬,还是其他