Hugh Brown wrote:
Previously, > 4powellz@home.com > wrote in comp.os.qnx, qdn.public.qnx4:
Hi Armin and thanks for your comments.
I still have questions, inserted below, that I hope you can consider
and reply to.
Thanks in advance,
Charlie Powell
Armin Steinhoff wrote:
In article <> 39EC6C60.AAB0B8E6@home.com> >, "> 4powellz@home.com> " says…
Hi,
We are developing a PCI based device that will be added to our computers
that run QNX 4.24. This is our first attempt to develop PCI hardware and
associated QNX hosted software to communicate with the hardware.
My job is to develop the QNX software and I’m confused. I see QNX has
C library functions for PCI but those functions only provide access
to the “configuration space” of the PCI device.
… and that is completely sufficient.
Ok. That looks good
to me. I assume I can use this to identify the interrupt, I/O space
and memory space the device is using and given that I can “talk”
with the device.
Yes … the device resources ( base address reg a.s.o) must be mapped into the
address space of your driver. Then you can talk to the device …
Yes. I see QNX sample programs in the C Library book where the
program sets up shared memory and then maps it to the programs
address space. Just like you said. With this information I see
that I can read and write to the memory space of the PCI device.
Or do I have to issue commands to the PCI controller
of the host processor and it talks to the device?
NO … you dont’t have to talk to the PCI controller. That’s normaly the task of
the system BIOS.
For example, I want to utilize burst mode transfers to move data.
Do I have to program the PCI controller on the host processor to
accomplish this?
If your device supports burst mode … then the initial setup of the PCI
controller should be done at system start ( mostly by a serial EEPROM )
The hardware engineers tell me the device we’re building does support
burst mode. In fact they insist the software under QNX has to provide
burst capability too.
Right now this is the sticking point. I don’t see how to implement burst
mode transfer. All the code samples show single read/write operations
to the device’s address space and I haven’t found any way to start
a burst transfer from the software under QNX.
Do you have any suggestions?
I don’t find much capability in QNX for PCI
What I have found was sufficient enough to write a shared memory backplane
(network) driver for a cPCI system … let me know what you are missing.
Did your driver utilize burst transfers? If so, how was a burst mode
transaction initiated? Did the driver software cause the PCI burst
mode transfer to start or was it a device, other than the QNX host
computer, that caused the burst mode transfer to start?
and I assume QNX wouldn’t
require me to program the PCI controller chip so I’m of the opinion
that the PCI device must do the work.
I don’t see any PCI specific tasks for QNX itself.
For example, the PCI device provides an address that I can write to
to accomplish single word transfers. Or it could provide an address
that I write a pointer to and the device uses that pointer to read
the data. Furthermore, the device controls the burst and non-burst
option.
You don’t need no specific QNX services to program your device … what you need
is just a good documentation about how you get access to the resources of your
controller ( via the config space)
As you can see I’m a bit confused about PCI and your help would
be appreciated.
post the output of show_pci -v …
Our PCI device is still under development and is not yet operating
with QNX. The engineers are using a Windows system for their work.
I can’t get a “show_pci” display that includes that device.
Is your device a bus master or will it only work in programmed I/O mode?
If it is a bus master, the hardware should perform the data transfer
between memory and the adapter. If you are using programmed I/O, the only
way to perform burst transfers is to stay in a loop, outputting the data.
I assume it will support bus master operation. Sorry, I don’t know what
“programmed I/O mode” means. Maybe its not important considering the
following description and questsions.
Assuming the PCI device can act as PCI bus master then it makes sense to
require the PCI device perform the data transfer between its local
memory
and the memory of the single board computer.
If the PCI device can not act as PCI bus master or the PCI device
designers
prefer to not implement that then what can a QNX hosted application do,
if anything, to setup the PCI to drive burst mode transfers across the
PCI
bus between the PCI device and the single board computer?
For example, our designers appear to want to provide two buffer
locations
on the PCI device. One buffer for multi-word messages to be moved from
the
device to the single board computer and the other buffer for messages
going the other direction. In this scenario, the CPU of the single board
computer will have to move the data, via the PCI bus. A QNX application
could use shm_mem, mmap and memcpy to move the data but would this
data transfer be single-word transfer or burst mode transfer? Could that
application do something to ensure burst mode is used?
Armin
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Hugh Brown (613) 591-0931 ext. 209 (voice)
QNX Software Systems Ltd. (613) 591-3579 (fax)
175 Terence Matthews Cres. email: > hsbrown@qnx.com
Kanata, Ontario, Canada.
K2M 1W8