Problems using write and signal

I have two processes (A and B).

‘A’ manages clock hardware and distributes time to other processes,
including ‘B’. It does this by sending SIGUSR1 signals to ‘B’ at a
prearranged rate (for example 200Hz).

On receiving the signals B captures data from its ADC hardware and buffers
it - the capturing/buffering is done in the signal handler (with help from a
hardware IRQ handler). Every so often (about every 6 seconds), 'B’s ‘main’
program writes the buffered data to disk. Its write routine has a test for
EINTR which causes a write that was interrupted to be restarted immediately.

When I make ‘B’ log data to a ramdisk this works OK. When ‘B’ logs to an IDE
disk, there are periods during the disk write when it stops receiving
signals. For example when writing a 1Mb file it can stop receiving signals
for around 200mS. The first signal after the gap is in-between the 200Hz
sample periods, so I guess that during the gap signals are blocked and the
first signal received is a pending one.

I have tried increasing 'B’s priority with respect to Fsys.eide (and with
priority ‘floating’ turned off in Fsys) but it makes no difference.

Any help very gratefully received.

Simon Flower
British Geological Survey, Edinburgh

Simon Flower <s.flower@bgs.ac.uk> wrote:

‘A’ manages clock hardware and distributes time to other processes,
including ‘B’. It does this by sending SIGUSR1 signals to ‘B’ at a
prearranged rate (for example 200Hz).

Fsys is a “signal catching” process, so it gets to decide how to process
the signal (block it or try and interrupt the disk operation and allow
the signal through). This decision is based on what operation is being
performed, how far into that operation, and if the disk driver supports
aborting an active request. Otherwise the signal may be held off for
the duration of the request (if there is a lot of data to write and disk
head seeks are involved this may be in the order of 100s of msecs).

You’ll need to decouple the periodic data collection from the (slower)
data processing/storage phase, via another process and some buffering.
For example ‘B’ could place the data into a shared memory buffer (or
message queue) for ‘C’ to write to disk. Or, since a ramdisk appears
to be fast enough (and involves no external/hardware delays) you could
use that as the temporary buffer and use ‘C’ to periodically copy/append
the ramdisk file to another on the EIDE disk.