Charles…
If you are working with RTP (Neutrino base), then in Neutrino you would
do something like what follows. If you are working in QNX 4.25, then you
do the second part…
Hope it helps.
Regards…
Miguel.
P.S. these are for a Dyamond Sys. a/d board.
//////////////// neutrino based system
//////////////////////////////////
template
void ICLad::init( void )
{
int errvalue;
//… attach the hardware adrress…
errno = EOK;
//… get the memory location for device io
ThreadCtl( _NTO_TCTL_IO, 0);
portAD = mmap_device_io( 2, ICL_AD_BASE );
portAD_LSB = mmap_device_io( 1, ICL_AD_PORT_LSB );
portAD_MSB = mmap_device_io( 1, ICL_AD_PORT_MSB );
portAD_CHREG = mmap_device_io( 1, ICL_AD_PORT_CHREG );
portAD_DIO = mmap_device_io( 1, ICL_AD_PORT_DIO );
portAD_SR = mmap_device_io( 1, ICL_AD_PORT_SR );
portAD_CR = mmap_device_io( 1, ICL_AD_PORT_CR );
portAD_TCR = mmap_device_io( 1, ICL_AD_PORT_TCR );
portAD_RBR = mmap_device_io( 1, ICL_AD_PORT_RBR );
portAD_CT0 = mmap_device_io( 1, ICL_AD_PORT_CT0 );
portAD_CT1 = mmap_device_io( 1, ICL_AD_PORT_CT1 );
portAD_CT2 = mmap_device_io( 1, ICL_AD_PORT_CT2 );
portAD_CTRX = mmap_device_io( 1, ICL_AD_PORT_CTRX );
//…
errvalue = errno;
printf( “The error generated was %d\n”, errvalue );
printf( “That means: %s\n”, strerror( errvalue ) );
//…
//…init the state machine
CurrentState = ICL_STATE_MPC_INIT;
//…counter 1 is driven by internal clock, and this counter in
//…turns drives counter 2 which drives the AD interrupt
//…both counters use mode 2, which corresponds to a rate generator.
//…initizlize the counter for internal AD trigger
//… both are binary counters…
out8( portAD_CTRX, 0x74 ); //… 0111 0100 => k1, write lsb frst. then
msb, mode 2, bin
out8( portAD_CTRX, 0xB4 ); //… 1011 0100 => k2, write lsb frst, then
msb, mode 2, bin
//… we want to sample each AD channer at 80 Hz.
out8( portAD_CT1, 0x1A ); //… 0001 1010 => 0x1A 0x61A |
out8( portAD_CT1, 0x06 ); //… 0000 0110 => 0x06 = 1562 | 0x61A*1 =
0X61A = 1562;
out8( portAD_CT2, 0x01 ); //… 0000 0001 => 0x01 = 1 | 1 MHz /
1562 = 640.2 Hz
out8( portAD_CT2, 0 ); //… 0000 0000 => 0x00 = 0 _| 640.2
Hz/8 = 80.02 Hz per AD channel
//…init the counter/timer control register
//…no gate for external A/D clocking, internal input source to
//…timer counter, counters 1 and 2 run freely
out8( portAD_TCR, 0x02 );
//…init the first and final A/D channel to servic: start at
//…channel 0 and end at channel 7 (differential, bipolar)
out8( portAD_CHREG, 0x70 );
//…clear interrupt
out8( portAD_SR, 0);
//…init the A/D Control Register (CR)
//…enable interrupts, interrupt level 7, disable DMA operation,
//…Enable hardware trigger, internal trigger source.
out8( portAD_CR, 0xF3 );
}
////////////////////////////////////////////////////////////////////////
/////////////////// QNX 4.25 based system ////////////////////////////
template
void ICLad::init( void )
{
//…this is how we compile this file…
//… CC -o ad -T1 ad.C
//…init the state machine
CurrentState = ICL_STATE_MPC_INIT;
//…counter 1 is driven by internal clock, and this counter in
//…turns drives counter 2 which drives the AD interrupt
//…both counters use mode 2, which corresponds to a rate generator.
//…initizlize the counter for internal AD trigger
//… both are binary counters…
outp( ICL_AD_PORT_CTRX, 0x74 ); //… 0111 0100 => k1, write lsb frst.
then msb, mode 2, bin
outp( ICL_AD_PORT_CTRX, 0xB4 ); //… 1011 0100 => k2, write lsb frst,
then msb, mode 2, bin
//… we want to sample each AD channer at 80 Hz. _
outp( ICL_AD_PORT_CT1, 0x1A ); //… 0001 1010 => 0x1A 0x61A |
outp( ICL_AD_PORT_CT1, 0x06 ); //… 0000 0110 => 0x06 = 1562 |
0x61A*1 = 0X61A = 1562;
outp( ICL_AD_PORT_CT2, 0x01 ); //… 0000 0001 => 0x01 = 1 | 1 MHz
/ 1562 = 640.2 Hz
outp( ICL_AD_PORT_CT2, 0 ); //… 0000 0000 => 0x00 = 0 _|
640.2 Hz/8 = 80.02 Hz per AD channel
//…init the counter/timer control register
//…no gate for external A/D clocking, internal input source to
//…timer counter, counters 1 and 2 run freely
outp( ICL_AD_PORT_TCR, 0x02 );
//…init the first and final A/D channel to servic: start at
//…channel 0 and end at channel 7 (differential, bipolar)
outp( ICL_AD_PORT_CHREG, 0x70 );
//…clear interrupt
outp(ICL_AD_PORT_SR, 0);
//…init the A/D Control Register (CR)
//…enable interrupts, interrupt level 7, disable DMA operation,
//…Enable hardware trigger, internal trigger source.
outp( ICL_AD_PORT_CR, 0xF3 );
//printf("\n ICL_AD_PORT_CR = %x",inp(ICL_AD_PORT_CR) );
}
////////////////////////////////////////////////////////////////////////
–
my opinions are mine, only mine, solely mine, and they are not related
in any possible way to the institution(s) in which I study and work.
Miguel Simon
Research Engineer
School of Aerospace and Mechanical Engineering
University of Oklahoma
http://www.amerobotics.ou.edu/
http://www.saic.com