PCI Graphics Problem

QNX Newsgroups (Archives) qdn.public.qnxrtp.os
1

I have been trying to access the memory mapped video controller registers on
a Nat Semi Geode part. I followed the instructions in the “Talking to
hardware under QNX Neutrino” examples from the QNX Developer Discussion
series however I am still having problems.

I’ve just set the code up to read a single register. I can correctly read
the PCI Vendor and Device ID as well as the base address register. However
when I read from the address pointed to by the base address register I am
getting values which don’t correspond to the ones I’d expect. Any
suggestions would be appreciated.

Regards

Malcolm

*** Code follows ***

main()
{
struct pci_dev_info info;
void *hdl;
int i;
volatile uint32_t *base;
unsigned int hex_val;

memset(&info, 0, sizeof (info));

if (pci_attach(0) < 0) {
perror(“pci_attach”);
exit(EXIT_FAILURE);
}

info.VendorId = 0x1078;
info.DeviceId = 0x104;

if ((hdl = pci_attach_device(0,
PCI_SHARE|PCI_INIT_ALL, 0, &info)) == 0) {
perror(“pci_attach_device”);
exit(EXIT_FAILURE);
}
// Get the PCI info
for (i = 0; i < 6; i++) {
if (info.BaseAddressSize > 0)
printf(“Aperture %d: "
“Base 0x%llx Length %d bytes Type %s\n”, i,
PCI_IS_MEM(info.CpuBaseAddress) ?
PCI_MEM_ADDR(info.CpuBaseAddress) :
PCI_IO_ADDR(info.CpuBaseAddress),
info.BaseAddressSize,
PCI_IS_MEM(info.CpuBaseAddress) ? “MEM” : “IO”);
}
// Read the base address register
pci_read_config32(info.BusNumber, info.DevFunc, 0x10, 1, &base);

//Read out some of the registers, starting at the base address
for ( i = 0; i < 16; i++ )
{
printf(”%08x: %08x\n", base+i, base);
}
pci_detach_device(hdl);
}

2

Malcolm Adams <Mal_Adams@bigpond.com> wrote:

I have been trying to access the memory mapped video controller registers on
a Nat Semi Geode part. I followed the instructions in the “Talking to
hardware under QNX Neutrino” examples from the QNX Developer Discussion
series however I am still having problems.

I’ve just set the code up to read a single register. I can correctly read
the PCI Vendor and Device ID as well as the base address register. However
when I read from the address pointed to by the base address register I am
getting values which don’t correspond to the ones I’d expect. Any
suggestions would be appreciated.

The address in the PCI configuration space is a physical address, but
you cannot use Physical addresses in your C code.

You have to use one of the `mmap???’ calls to get a C pointer that you can
use that will correspond to that physical address.

3

I tried the following with no luck, I still get all zeros where I expect to
see the memory mapped registers for the Video controller. info is a struct
containing the result from a call to pci_attach_device, the call works as I
can read the PCI Header registers correctly.

volatile uint32_t *regbase;

regbase = mmap_device_memory(NULL, info.CpuBaseAddressSize[0],
PROT_READ|PROT_WRITE|PROT_NOCACHE, 0,
info.CpuBaseAddress[0]);

for ( i = 0; i < 32; i++ )
{
printf("%08x: %08x\n", regbase+i, regbase_);
}

What am I doing wrong?

<pete@qnx.com> wrote in message news:98nvei$lhf$1@nntp.qnx.com…_

Malcolm Adams <> Mal_Adams@bigpond.com> > wrote:
I have been trying to access the memory mapped video controller
registers on
a Nat Semi Geode part. I followed the instructions in the “Talking to
hardware under QNX Neutrino” examples from the QNX Developer Discussion
series however I am still having problems.

I’ve just set the code up to read a single register. I can correctly
read
the PCI Vendor and Device ID as well as the base address register.
However
when I read from the address pointed to by the base address register I
am
getting values which don’t correspond to the ones I’d expect. Any
suggestions would be appreciated.

The address in the PCI configuration space is a physical address, but
you cannot use Physical addresses in your C code.

You have to use one of the `mmap???’ calls to get a C pointer that you can
use that will correspond to that physical address.