We are running pci-raven with no command line options. We have a six slot
backplane - for 5 cards plus the SBC.
We tested every slot and it now seems that sometimes interrupt 0 is assigned
and sometimes we get “no connection”. The same slot may give interrupt 0
after booting one time, and “no connection” after the next boot.
The output from “pci -v” is attached at the end of this posting. The last
device listed is our board.
Thanks,
Wayne
“Hugh Brown” <hsbrown@qnx.com> wrote in message
news:Voyager.011003081027.8845C@node90.ott.qnx.com…
I presume that you are running pci-raven? How many PCI slots do you have
on the SBC? Does interrupt 0 get assigned in all the slots? The output
from ‘pci -v’ would also be helpful.
Previously, Wayne Fisher wrote in qdn.public.qnxrtp.os:
[snip]
On an architecture-dependent related note, how do the PCI servers differ
between an x86 host and, say, pci-raven with regards to assigning
interrupts?
We have now managed to get data to move via DMA between the host and the
card and vice-versa. So now we’re looking at hooking up to the DMA
transfer
complete interrupt and are having some problems. Everything seems fine
when
we plug the board into an x86 PC. The card is assigned an interrupt (Int
5,
in this case). We see that interrupt number in the BIOS startup, we see
it
in “pci -v”, and we see it in the pci_dev_info structure. We attach to
it
and we receive the interrupt.
Now we move on to the PowerPC on a Motorola MCP750 single board
computer.
Using the same card, both “pci -v” and the pci_dev_info structure report
that it’s using int 0. Interrupt “0” immediately sends alarms off in our
heads, but we attach to it anyway. Unfortunately, we don’t receive the
interrupt in our software using the same C source code.
We’ve looked through the online docs and have found functions like
pci_map_irq(), and pci_irq_routing_options() but we don’t know if we
should
be using them. We tried a few instances of pci_map_irq() without
success.
Does any documentation exist on how all this PCI stuff is supposed to
work?
We couldn’t seem to find anything in the docs.
How do we get a valid interrupt assigned to this card on the PowerPC
SBC?
Thanks,
Wayne
PCI version = 2.10
Class = Bridge (Host/PCI)
Vendor ID = 1057h, Motorola
Device ID = 4801h, Raven PowerPC Chipset
PCI index = 0h
Class Codes = 060000h
Revision ID = 5h
Bus number = 0
Device number = 0
Function num = 0
Status Reg = 2280h
Command Reg = 6h
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
CPU Bus Master Translation = 80000000h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = NC
Interrupt line = 0
Class = Bridge (PCI/ISA)
Vendor ID = 1106h, VIA Technologies Inc
Device ID = 586h, VT82C586VP PCI-to-ISA Bridge
PCI index = 0h
Class Codes = 060100h
Revision ID = 41h
Bus number = 0
Device number = 1
Function num = 0
Status Reg = 200h
Command Reg = 87h
Header type = 0h Multi-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
CPU Bus Master Translation = 80000000h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = NC
Interrupt line = 0
Class = Mass Storage (IDE)
Vendor ID = 1106h, VIA Technologies Inc
Device ID = 571h, VT82C586/686 PCI IDE Controller
PCI index = 0h
Class Codes = 01018fh
Revision ID = 6h
Bus number = 0
Device number = 1
Function num = 1
Status Reg = 280h
Command Reg = 85h
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 20h
Cache Line Size= 0h
CPU Bus Master Translation = 80000000h
PCI IO Address = fff0h length 8 enabled
CPU IO Address = 8000fff0h
PCI IO Address = ffech length 4 enabled
CPU IO Address = 8000ffech
PCI IO Address = ffe0h length 8 enabled
CPU IO Address = 8000ffe0h
PCI IO Address = ffdch length 4 enabled
CPU IO Address = 8000ffdch
PCI IO Address = ffc0h length 16 enabled
CPU IO Address = 8000ffc0h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 14
Class = Serial Bus (Universal Serial Bus)
Vendor ID = 1106h, VIA Technologies Inc
Device ID = 3038h, VT83C572 PCI USB Controller
PCI index = 0h
Class Codes = 0c0300h
Revision ID = 2h
Bus number = 0
Device number = 1
Function num = 2
Status Reg = 200h
Command Reg = 5h
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 16h
Cache Line Size= 8h un-cacheable
CPU Bus Master Translation = 80000000h
PCI IO Address = ffa0h length 32 enabled
CPU IO Address = 8000ffa0h
Subsystem Vendor ID = 925h
Subsystem ID = 1234h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT D
Interrupt line = 11
Class = Pre-2.0 (Non-VGA)
Vendor ID = 1106h, VIA Technologies Inc
Device ID = 3040h, VT83C572 Power Management Controller
PCI index = 0h
Class Codes = 000000h
Revision ID = 10h
Bus number = 0
Device number = 1
Function num = 3
Status Reg = 280h
Command Reg = 0h
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
CPU Bus Master Translation = 80000000h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = NC
Interrupt line = 0
Class = Network (Ethernet)
Vendor ID = 1011h, Digital Equipment Corporation
Device ID = 9h, DC21140 Fast Ethernet Ctrlr
PCI index = 0h
Class Codes = 020000h
Revision ID = 22h
Bus number = 0
Device number = 4
Function num = 0
Status Reg = 280h
Command Reg = 7h
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 20h
Cache Line Size= 8h un-cacheable
CPU Bus Master Translation = 80000000h
PCI IO Address = fffff00h length 128 enabled
CPU IO Address = 8fffff00h
PCI Mem Address = 3bffff00h 32bit length 128 enabled
CPU Mem Address = fbffff00h
PCI Expansion ROM = 3ffc0000h length 262144 disabled
CPU Expansion ROM = fffc0000h
Max Lat = 40ns
Min Gnt = 20ns
PCI Int Pin = INT A
Interrupt line = 2
Class = Bridge (PCI/PCI)
Vendor ID = 1011h, Digital Equipment Corporation
Device ID = 26h, 21154 PCI-PCI Bridge
PCI index = 0h
Class Codes = 060400h
Revision ID = 2h
Bus number = 0
Device number = 10
Function num = 0
Status Reg = 290h
Command Reg = 7h
Header type = 1h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 80h
Cache Line Size= 8h un-cacheable
CPU Bus Master Translation = 80000000h
Primary Bus Number = 0h
Secondary Bus Number = 1h
Subordinate Bus Number = 1h
Secondary Latency Timer = 80h
I/O Base = e1h
I/O Limit = e1h
Secondary Status = 2280h
Memory Base = 3000h
Memory Limit = 3be0h
Prefetchable Memory Base = fff1h
Prefetchable Memory Limit= 1h
Prefetchable Base Upper 32 Bits = ffffffffh
Prefetchable Limit Upper 32 Bits = 0h
I/O Base Upper 16 Bits = ffffh
I/O Limit Upper 16 Bits = ffffh
Bridge Control = 0ns
PCI Int Pin = NC
Interrupt line = 0
Class = Data Acquisition (Unknown)
Vendor ID = 10b5h, PLX Technology
Device ID = 9656h, PCI 9656 64-bit 66 MHz PCI Master I/O Accelerator
PCI index = 0h
Class Codes = 118000h
Revision ID = abh
Bus number = 1
Device number = 10
Function num = 0
Status Reg = 2b0h
Command Reg = 7h
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 20h
Cache Line Size= 8h un-cacheable
CPU Bus Master Translation = 80000000h
PCI Mem Address = 3beffe00h 32bit length 512 enabled
CPU Mem Address = fbeffe00h
PCI IO Address = ef00h length 256 enabled
CPU IO Address = 8000ef00h
PCI Mem Address = 3beff000h 32bit length 2048 enabled
CPU Mem Address = fbeff000h
PCI Mem Address = 30000000h 32bit length 134217728 enabled
CPU Mem Address = f0000000h
Subsystem Vendor ID = 10b5h
Subsystem ID = 9656h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = no connection