I’m using a Lanner EM370 SBC with 4 serial ports. It appears that sharing
IRQ’s with multiple ports does not work. I am starting multpile
devc-ser8250’s as such:
If I disable ports com3 and com4, then I can get com1 to talk to com2. But
if I setup com3 and com4 to share interrupts with com1 and com2
(respectively) then I can NOT get com1 to talk to com2.
Any insight? Does anyone have serial ports sharing IRQ’s working? What
hardware?
I’m using a Lanner EM370 SBC with 4 serial ports. It appears that sharing
IRQ’s with multiple ports does not work. I am starting multpile
devc-ser8250’s as such:
If I disable ports com3 and com4, then I can get com1 to talk to com2. But
if I setup com3 and com4 to share interrupts with com1 and com2
(respectively) then I can NOT get com1 to talk to com2.
Look at the board`s documentation. Unless the board has special hardware
ISA IRQ can`t be shared.
Any insight? Does anyone have serial ports sharing IRQ’s working? What
hardware?
I’m using a Lanner EM370 SBC with 4 serial ports. It appears that sharing
IRQ’s with multiple ports does not work. I am starting multpile
devc-ser8250’s as such:
If I disable ports com3 and com4, then I can get com1 to talk to com2. But
if I setup com3 and com4 to share interrupts with com1 and com2
(respectively) then I can NOT get com1 to talk to com2.
Look at the boards documentation. Unless the board has special hardware ISA IRQ cant be shared.
I’m not sure about your card, but I worked with PCI card, it shared one interrupt line (in my case
it was int 9, I was able to program it) for all ports. Also all ports had specific addresses. And I
have those ports in addition to com1&com2 on motherboard.
I’m using a Lanner EM370 SBC with 4 serial ports. It appears that sharing
IRQ’s with multiple ports does not work. I am starting multpile
devc-ser8250’s as such:
I’m using a Lanner EM370 SBC with 4 serial ports. It appears that sharing
IRQ’s with multiple ports does not work. I am starting multpile
devc-ser8250’s as such:
If I disable ports com3 and com4, then I can get com1 to talk to com2. But
if I setup com3 and com4 to share interrupts with com1 and com2
(respectively) then I can NOT get com1 to talk to com2.
Look at the boards documentation. Unless the board has special hardware ISA IRQ cant be shared.
I’m not sure about your card, but I worked with PCI card, it shared one
interrupt line (in my case it was int 9, I was able to program it) for
all ports. Also all ports had specific addresses. And I
have those ports in addition to com1&com2 on motherboard.
ISA and PCI are different buses – the BIG difference for irqs is that
ISA uses edge-triggered interrupts, but PCI uses level-triggered interrupts.
You can share interrupts (assuming the drivers are bright enough) in a
level-triggered environment but not edge-triggered.
This rules out the above requested configuration.
(So, how does Windows handle com1 & com3 having the same IRQ? Polling.)
-David
QNX Training Services
I do not answer technical questions by email.
ISA and PCI are different buses – the BIG difference for irqs is that
ISA uses edge-triggered interrupts,
There is no limitation in PC/AT (pure ISA). You are able to program interrupt controller to work as
you’d like (see port 0x20, bit 3 of the first control word).
but PCI uses level-triggered interrupts.
You can share interrupts (assuming the drivers are bright enough) in a
level-triggered environment but not edge-triggered.
Why? There is small probability to miss the interrupt, but only if you have ISA card’s hardware
which wasn’t designed for such purposes (the all ISA cards, as a rule) or if you do mistake in ISR.
For exampe, I worked with our own ISA card, it has status register (port) to see interrupt request
bit on card and control register (port) to rise up interrupt line back - I guess it has enough
hardware to share interrupt even in edge-trigged environment. You just have to do polling of
another card as last step in your ISR. Theoreticly it is possible and, of course, level-trigged
interrupts are preferable in this case. I think the main reason it was not used in old ISA days is
because there is only one quite solid answer: if your device require to send interrupt request,
take a free interrupt line for your device. IMO it is not always good to have ISR’s train instead
of an ISR, it is not knowen in which carriage is my ISR… So, PCI interrupt sharing is some kind
of multi-media… You have many things, but they are not quite well… It’s only my opinion
This rules out the above requested configuration.
(So, how does Windows handle com1 & com3 having the same IRQ? Polling.)
I’m not impressed by this windows behaviour.
Eduard.
-David
QNX Training Services
I do not answer technical questions by email.
ISA and PCI are different buses – the BIG difference for irqs is that
ISA uses edge-triggered interrupts,
There is no limitation in PC/AT (pure ISA). You are able to program
interrupt controller to work as
you’d like (see port 0x20, bit 3 of the first control word).
ISA is edge-triggered, EISA can be both.
Why? There is small probability to miss the interrupt, but only if you
have ISA card’s hardware
which wasn’t designed for such purposes (the all ISA cards, as a rule) or
if you do mistake in ISR.
Not true, if you have a device that generates many interrupts, (ie a NIC
card) you couldn’t share it’s IRQ on an ISA bus with another device
reliably. The moment you send the EOI for for a particular interrupt, you
will fail to receive notification for any pending IRQs on the same line.
With a PC, I always felt limited by the software available.
On Unix, I am limited only by my knowledge.
–Peter J. Schoenster <pschon@baste.magibox.net>
ISA and PCI are different buses – the BIG difference for irqs is that
ISA uses edge-triggered interrupts,
There is no limitation in PC/AT (pure ISA). You are able to program
interrupt controller to work as
you’d like (see port 0x20, bit 3 of the first control word).
ISA is edge-triggered, EISA can be both.
Sorry, I mixed them PC/AT has EISA, I guess…
Why? There is small probability to miss the interrupt, but only if you
have ISA card’s hardware
which wasn’t designed for such purposes (the all ISA cards, as a rule) or
if you do mistake in ISR.
Not true, if you have a device that generates many interrupts, (ie a NIC
card) you couldn’t share it’s IRQ on an ISA bus with another device
reliably. The moment you send the EOI for for a particular interrupt, you
will fail to receive notification for any pending IRQs on the same line.
Yes, I’ll fail to receive notification. That’s why I wrote I’ll have to poll another card(s) in
last step of ISR, after sending EOI to controller. (to look at status register of another card in
order to see have I that fail or not).
The main my idea was it’s not good idea to share interrupts esp. for NIC cards…
Eduard.
With a PC, I always felt limited by the software available.
On Unix, I am limited only by my knowledge.
–Peter J. Schoenster <> pschon@baste.magibox.net
\
Yes, I’ll fail to receive notification. That’s why I wrote I’ll have to poll another card(s) in
last step of ISR, after sending EOI to controller. (to look at status register of another card in
order to see have I that fail or not).
I guess the “send EOI” is the duty of the QNXRTP OS. So, I agree, this trick is not possible under
QNXRTP.
Eduard.
hardware to share interrupt even in edge-trigged environment. You just have to do polling of
“Polling” usually means the loop until the event occurs. Don’t polling, just do check the state of
the anohter card. I’m sorry for my “brilliantly” english.
Eduard.
