A second question about 'pci_attach_device()'

QNX Newsgroups (Archives) qdn.public.qnxrtp.os
1

Base address registers are stored in an array of 6 x 32 bit entries in the PCI config header. The
PciBaseAddress
array in pci_dev_info is 6 x 64 bits.
Why is this? Is the routine decoding bits 2 and 1 to determine if the address is 32 bits or 64
bits?

Also, what are the CpuBaseAddress registers?

Thanks.

–
Art Hays
National Institutes of Health
avhays@nih.gov

2

Previously, Art Hays wrote in qdn.public.qnxrtp.os:

Base address registers are stored in an array of 6 x 32 bit entries in the PCI config header. The
PciBaseAddress
array in pci_dev_info is 6 x 64 bits.
Why is this? Is the routine decoding bits 2 and 1 to determine if the address is 32 bits or 64
bits?

Yes, we decode bits 1 & 2 to see whether the register is 32 or 64-bits wide,
hence the 64-bit values for the base registers.

Also, what are the CpuBaseAddress registers?

Some platforms translate addresses across PCI bridges, so that there is one
address on the PCI side of the bridge and another on the CPU side. That is
why the structure has both addresses.

Thanks.

–
Art Hays
National Institutes of Health
avhays@nih.gov