“Dmitri Poustovalov” <pdmitri@bigfoot.com> wrote in message
news:benrgq$ppt$1@inn.qnx.com…
“Adam Mallory” <> amallory@qnx.com> > wrote in message
news:beh8in$n3s$> 1@nntp.qnx.com> …
charles.hubbard@pnl.gov> > wrote in message
news:> 9hamgvgiv2i2tn5rcuopemua3o17aqlc6l@4ax.com> …
A friend of mine or, more specifically, the development team with
which he is associated, is developing a new widget based on the
Motorola 8260 (a flavor of PowerPC with an additional communication
processor… I guess). They plan to run QNX 6 as their operating
system but recently they’ve discovered (or think they’ve discovered)
that the maximum amount of physical RAM QNX (running on the 8260 at
least) can access is 768MB. They would like to put 2GB of RAM on this
sytem. They are afraid a 768MB limit will preclude them from using
QNX.
Seems strange that you’re posting in proxy for one of our customers (and
I
think they are already going through their support channel).
Can someone verify for me that there is a 768MB limit with QNX 6 on an
8260? It seems possible but this is the first I’ve ever heard of it
and, on the x86 at any rate, I’ve seen posts that suggest the limit is
4GB (seems reasonable on a 32-bit CPU, no?). If there is a 768MB
limit on the 8260, is this a QNX issue or is the limitation due to the
processor itself?
A 32bit core may be able to put down a 32bit physical address, but the
rest
of the components on the board might not support the entire range (ie.
memory controller). I don’t think we’ve ever seen a reference platform
with
more than 64meg on the 8260 (memory controllers didn’t support 2G).
Well, Embedded Planet offers up to 256 MB. Also accordingly Motorola
(> http://e-www.motorola.com/files/netcomm/doc/app_note/AN2165.pdf> ) 2G is
supported by the latest HiP4 version of 8260.
Having said that I would question 8260+2GB RAM design anyway. I guess 2GB
is
used for data but 16KB L1 data cache on 8260 is a bottleneck and there is
no
8260 L2 cache, neither internal nor external. It will be very slow.
Motorola’s PowerPC 7xxx would do better job crunching 2GB of data. If
speed
of data access is no concern then why to mess with SDRAM? Couple
Disk-On-Chip’s might be sufficient.
I think SDRAM will still be faster than DOC. Also speed of SDRAM depends on
more factors than just L2 cache. I’ve tested 666Mhz 750FX (IBM G3-level PPC)
board with 133Mhz SDRAM and 512Kb L2 against 700Mhz P3 with 133Mhz SDRAM and
256Kb L2 (i think, since this is not the Tualatin core)
On the data-moving type of bechmarks using chunks of 4 to 16K Intel just
leaves 750FX in the dust (2-3 times faster), despite smaller L2 cache. The
reason I think is inefficient SDRAM controller (Marvell Discovery in this
case). OTOH, when using chunks of 2k and smaller the PPC ended up beating
Intel by about 15%, despite slightly lower clock rate (and presumably
inefficient memory controller). The context switch on PPC must be a lot less
expensive …
The only PPCs with DDR FSB so far are IBM 440 and 970. I am looking forward
to check the 440, too bad it does not boot so far 
– igor