Hi,
The QNX6.2.1B BSP of the Lite5200 board was using the IRQs 49 and 50 for
the CAN controllers of the MPC5200.
Is this still the case for the BSP of QNX6.3 ??
Best Regards
Armin Steinhoff
Hi,
The QNX6.2.1B BSP of the Lite5200 board was using the IRQs 49 and 50 for
the CAN controllers of the MPC5200.
Is this still the case for the BSP of QNX6.3 ??
Best Regards
Armin Steinhoff
Armin Steinhoff <a-steinhoff@web.de> wrote:
Hi,
The QNX6.2.1B BSP of the Lite5200 board was using the IRQs 49 and 50 for
the CAN controllers of the MPC5200.Is this still the case for the BSP of QNX6.3 ??
It depends on how each individual peripheral’s HI/LO priority is configured.
In the 6.2.1 BSP, only LO peripheral interrupts were supported, and peripheral
interrupts occupied the range of 32 - 53. Now, both HI and LO are supported,
with HI peripherals going from 32 - 53, and LO peripherals going from 64 - 85.
By default, all peripheral interrupts are programmed with the bit set to LO,
so, in the case of the CAN interrupts, they are now 81 and 82 by default.
However, if you were to set their priority bit to HI, they would be 49
and 50. The build file in the startup source contains a full interrupt map.
Best Regards
Armin Steinhoff
–
David Green (dgreen@qnx.com)
QNX Software Systems Ltd.
http://www.qnx.com
Dave, thanks a lot.
Armin
Dave Green wrote:
Armin Steinhoff <> a-steinhoff@web.de> > wrote:
Hi,
The QNX6.2.1B BSP of the Lite5200 board was using the IRQs 49 and 50 for
the CAN controllers of the MPC5200.
Is this still the case for the BSP of QNX6.3 ??
It depends on how each individual peripheral’s HI/LO priority is configured.
In the 6.2.1 BSP, only LO peripheral interrupts were supported, and peripheral
interrupts occupied the range of 32 - 53. Now, both HI and LO are supported,
with HI peripherals going from 32 - 53, and LO peripherals going from 64 - 85.By default, all peripheral interrupts are programmed with the bit set to LO,
so, in the case of the CAN interrupts, they are now 81 and 82 by default.
However, if you were to set their priority bit to HI, they would be 49
and 50. The build file in the startup source contains a full interrupt map.
Best Regards
Armin Steinhoff
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