I have the following situation, hope somebody will help me:
PCI hardware have LUT data in system memory for the DMA scatter/gather,
which is disabled by default. When LUT’s entries contains of all zeroes
adapter will ignore data in it, when LUT table’s entries are not all zero
adapter will start to cache data of physical addresses, which are just
entries in the LUT. So if LUT will be enabled with LUT data in system memory
which are not cleared, adapter will begin DMA transfers using wrong and/or
bad physical addresses.
My code looks like this (it’s for x86 platform only !):
asm volatile (“wbinvd”: : :“memory”);
I’m using wbinvd CPU command to be sure, that memset clearing will be done
and all LUT data already cleared before I engage LUT engine. Otherwise
without using wbinvd it is exist probability when LUT engine will be enabled
before all CPU caches are flushed with delayed writeback writes.
But driver segfaults when executing wbinvd CPU command with GP #0, even when
all IOs are permitted by using ThreadCtl(_NTO_TCTL_IO, …
Is it possible somehow to flush all delayed writes in the CPU caches in QNX
6.3 SP3 for x86 ?
Thanks in advance !
With best regards, Mike Gorchak. E-mail: firstname.lastname@example.org