in 6.3.2, I can use vesa, or svga and my vga and DVI are both displayed but as soon as I use the i830 driver, only vga monitor is active. Any boday know how I can make this work?
Thanks
Under QNX 4 I always had to go into the graphics config file to make 2 monitors work.
Both device descriptions had to appear on the same line, I think separated by a ‘;’.
I don’t think this changed under QNX 6.
I would also check “pci” to make sure that the device appears twice.
BTW, in Vesa mode, do you get two different views or is the output being duplicated to each monitor?
I get the duplicated view, which is what I want. I’ll check the PCI -vv and post it here. I use to use the Radeon dual display and it just worked out of the box. if you can show me how to make changes to the graphics config file, I’ll give that a try. thanks
Duplicated view is a chip function. The native driver probably takes it out of that mode. You might be able to get it back by having Photon point both monitors at the same Photon space. This takes more overhead. I haven’t seen support in a QNX driver before for the duplicated view, but it may be there somewhere.
here is the pci -vv output, it looks like the VGA is only displayed once here.
PCI version = 3.00
Class = Bridge (Host/PCI)
Vendor ID = 8086h, Intel Corporation
Device ID = 2770h, 945G/GZ/P/PL Express Memory Controller Hub
PCI index = 0h
Class Codes = 060000h
Revision ID = 2h
Bus number = 0
Device number = 0
Function num = 0
Status Reg = 2090h
Command Reg = 6h
I/O space access disabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
Subsystem Vendor ID = 8086h
Subsystem ID = 2770h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = NC
Interrupt line = 0
CPU Interrupt = 0h
Capabilities Pointer = e0h
Capability ID = 9h - Vendor Specific
Capabilities = 5109h - 9893c10ah
Device Dependent Registers:
0x40: 01 90 d1 fe 01 40 d1 fe 01 00 00 e0 01 80 d1 fe
0x50: 00 00 30 00 09 00 00 00 00 00 00 00 00 00 00 00
0x60: 01 30 d1 fe 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 10 11 01 00 00 11 11 00 ff 03 00 00 80 1a 39 00
0xA0: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 20 01 00 00
0xE0: 09 00 09 51 0a c1 93 98 07 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 03 00 00 00 00 00
Class = Display (VGA)
Vendor ID = 8086h, Intel Corporation
Device ID = 2772h, 945G/GZ Express Integrated Graphics Controller
PCI index = 0h
Class Codes = 030000h
Revision ID = 2h
Bus number = 0
Device number = 2
Function num = 0
Status Reg = 90h
Command Reg = 7h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI Mem Address = fdf00000h 32bit length 524288 enabled
PCI IO Address = ec00h length 8 enabled
PCI Mem Address = d0000000h prefetchable 32bit length 268435456 enabled
PCI Mem Address = fdf80000h 32bit length 262144 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 2772h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 9
CPU Interrupt = 9h
Capabilities Pointer = 90h
Capability ID = 5h - Message Signaled Interrupts
Capabilities = 0h - 0h
Capability ID = 1h - Power Management
Capabilities = 22h - 0h
Device Dependent Registers:
0x40: 00 00 00 00 e0 00 00 00 09 00 09 51 0a c1 93 98
0x50: 07 00 30 00 09 00 00 00 00 00 00 00 00 00 80 7f
0x60: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 05 d0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 34 05 64 34 00 00 00 00 86 0f 03 00 00 00 00 00
Class = Bridge (PCI/PCI)
Vendor ID = 8086h, Intel Corporation
Device ID = 27d0h, 82801G (ICH7 Family) PCI Express Port 1
PCI index = 0h
Class Codes = 060400h
Revision ID = 1h
Bus number = 0
Device number = 28
Function num = 0
Status Reg = 10h
Command Reg = 7h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 1h Multi-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 8h un-cacheable
Primary Bus Number = 0h
Secondary Bus Number = 1h
Subordinate Bus Number = 1h
Secondary Latency Timer = 0h
I/O Base = 90h
I/O Limit = 90h
Secondary Status = 2000h
Memory Base = fdb0h
Memory Limit = fdb0h
Prefetchable Memory Base = fde1h
Prefetchable Memory Limit= fde1h
Prefetchable Base Upper 32 Bits = 0h
Prefetchable Limit Upper 32 Bits = 0h
I/O Base Upper 16 Bits = 0h
I/O Limit Upper 16 Bits = 0h
Bridge Control = 4h
PCI Int Pin = INT A
Interrupt line = 9
CPU Interrupt = 9h
Capabilities Pointer = 40h
Capability ID = 10h - PCI Express
Capabilities = 141h - fc0h
Capability ID = 5h - Message Signaled Interrupts
Capabilities = 0h - 0h
Capability ID = dh - PCI Bridge Subsystem Vendor ID
Capabilities = 0h - 27d08086h
Capability ID = 1h - Power Management
Capabilities = c802h - 0h
Device Dependent Registers:
0x40: 10 80 41 01 c0 0f 00 00 04 00 10 00 11 2c 11 01
0x50: 40 00 11 30 60 05 80 00 00 00 48 01 04 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 0d a0 00 00 86 80 d0 27 00 00 00 00 00 00 00 00
0xA0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00
0xE0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Bridge (PCI/PCI)
Vendor ID = 8086h, Intel Corporation
Device ID = 27d2h, 82801G (ICH7 Family) PCI Express Port 2
PCI index = 0h
Class Codes = 060400h
Revision ID = 1h
Bus number = 0
Device number = 28
Function num = 1
Status Reg = 10h
Command Reg = 7h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 1h Multi-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 8h un-cacheable
Primary Bus Number = 0h
Secondary Bus Number = 2h
Subordinate Bus Number = 2h
Secondary Latency Timer = 0h
I/O Base = b0h
I/O Limit = b0h
Secondary Status = 2000h
Memory Base = fdd0h
Memory Limit = fdd0h
Prefetchable Memory Base = fdc1h
Prefetchable Memory Limit= fdc1h
Prefetchable Base Upper 32 Bits = 0h
Prefetchable Limit Upper 32 Bits = 0h
I/O Base Upper 16 Bits = 0h
I/O Limit Upper 16 Bits = 0h
Bridge Control = 4h
PCI Int Pin = INT B
Interrupt line = 5
CPU Interrupt = 5h
Capabilities Pointer = 40h
Capability ID = 10h - PCI Express
Capabilities = 141h - fc0h
Capability ID = 5h - Message Signaled Interrupts
Capabilities = 0h - 0h
Capability ID = dh - PCI Bridge Subsystem Vendor ID
Capabilities = 0h - 27d28086h
Capability ID = 1h - Power Management
Capabilities = c802h - 0h
Device Dependent Registers:
0x40: 10 80 41 01 c0 0f 00 00 04 00 10 00 11 2c 11 02
0x50: 40 00 11 30 60 05 88 00 00 00 48 01 04 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 05 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 0d a0 00 00 86 80 d2 27 00 00 00 00 00 00 00 00
0xA0: 01 00 02 c8 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 80 00 11 00 00 00 00 00
0xE0: 00 00 c7 00 06 07 08 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Serial Bus (Universal Serial Bus)
Vendor ID = 8086h, Intel Corporation
Device ID = 27c8h, 82801G (ICH7 Family) USB UHCI #1
PCI index = 0h
Class Codes = 0c0300h
Revision ID = 1h
Bus number = 0
Device number = 29
Function num = 0
Status Reg = 280h
Command Reg = 5h
I/O space access enabled
Memory space access disabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Multi-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI IO Address = e800h length 32 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27c8h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 11
CPU Interrupt = bh
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Serial Bus (Universal Serial Bus)
Vendor ID = 8086h, Intel Corporation
Device ID = 27c9h, 82801G (ICH7 Family) USB UHCI #2
PCI index = 0h
Class Codes = 0c0300h
Revision ID = 1h
Bus number = 0
Device number = 29
Function num = 1
Status Reg = 280h
Command Reg = 5h
I/O space access enabled
Memory space access disabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI IO Address = e400h length 32 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27c9h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT B
Interrupt line = 11
CPU Interrupt = bh
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Serial Bus (Universal Serial Bus)
Vendor ID = 8086h, Intel Corporation
Device ID = 27cah, 82801G (ICH7 Family) USB UHCI #3
PCI index = 0h
Class Codes = 0c0300h
Revision ID = 1h
Bus number = 0
Device number = 29
Function num = 2
Status Reg = 280h
Command Reg = 5h
I/O space access enabled
Memory space access disabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI IO Address = e000h length 32 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27cah
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT C
Interrupt line = 5
CPU Interrupt = 5h
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Serial Bus (Universal Serial Bus)
Vendor ID = 8086h, Intel Corporation
Device ID = 27cbh, 82801G (ICH7 Family) USB UHCI #4
PCI index = 0h
Class Codes = 0c0300h
Revision ID = 1h
Bus number = 0
Device number = 29
Function num = 3
Status Reg = 280h
Command Reg = 5h
I/O space access enabled
Memory space access disabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI IO Address = dc00h length 32 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27cbh
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT D
Interrupt line = 9
CPU Interrupt = 9h
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 10 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 2f 00 00 00 00 00 00 00 00 01 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Serial Bus (Universal Serial Bus)
Vendor ID = 8086h, Intel Corporation
Device ID = 27cch, 82801G (ICH7 Family) USB2 EHCI Controller
PCI index = 0h
Class Codes = 0c0320h
Revision ID = 1h
Bus number = 0
Device number = 29
Function num = 7
Status Reg = 290h
Command Reg = 6h
I/O space access disabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI Mem Address = fdfff000h 32bit length 1024 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27cch
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 11
CPU Interrupt = bh
Capabilities Pointer = 50h
Capability ID = 1h - Power Management
Capabilities = c9c2h - 0h
Capability ID = ah - Debug Port
Capabilities = 20a0h - 0h
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 01 58 c2 c9 00 00 00 00 0a 00 a0 20 00 00 00 00
0x60: 20 20 ff 01 00 00 00 00 01 00 00 01 00 00 00 e0
0x70: 00 00 dd 3f 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 11 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 aa ff 00 ff 00 ff 00 20 00 00 88
0xE0: 00 00 00 00 db b6 6d 00 00 00 00 00 00 00 00 00
0xF0: 00 80 00 09 88 85 40 00 86 0f 01 00 86 17 02 20
Class = Bridge (PCI/PCI)
Vendor ID = 8086h, Intel Corporation
Device ID = 244eh, 82801 PCI Bridge
PCI index = 0h
Class Codes = 060401h
Revision ID = e1h
Bus number = 0
Device number = 30
Function num = 0
Status Reg = 10h
Command Reg = 7h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 1h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
Primary Bus Number = 0h
Secondary Bus Number = 3h
Subordinate Bus Number = 3h
Secondary Latency Timer = 20h
I/O Base = a0h
I/O Limit = a0h
Secondary Status = 2280h
Memory Base = fda0h
Memory Limit = fda0h
Prefetchable Memory Base = fd91h
Prefetchable Memory Limit= fd91h
Prefetchable Base Upper 32 Bits = 0h
Prefetchable Limit Upper 32 Bits = 0h
I/O Base Upper 16 Bits = 0h
I/O Limit Upper 16 Bits = 0h
Bridge Control = 4h
PCI Int Pin = NC
Interrupt line = no connection
Capabilities Pointer = 50h
Capability ID = dh - PCI Bridge Subsystem Vendor ID
Capabilities = 0h - 244e8086h
Device Dependent Registers:
0x40: 40 00 00 00 00 00 00 00 00 00 00 00 00 12 00 00
0x50: 0d 00 00 00 86 80 4e 24 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Bridge (PCI/ISA)
Vendor ID = 8086h, Intel Corporation
Device ID = 27b8h, 82801GB/GR (ICH7 Family) LPC Interface Bridge
PCI index = 0h
Class Codes = 060100h
Revision ID = 1h
Bus number = 0
Device number = 31
Function num = 0
Status Reg = 210h
Command Reg = 107h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver enabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Multi-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
Subsystem Vendor ID = 8086h
Subsystem ID = 27b8h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = NC
Interrupt line = 0
CPU Interrupt = 0h
Capabilities Pointer = e0h
Capability ID = 9h - Vendor Specific
Capabilities = 100ch - 2400a8h
Device Dependent Registers:
0x40: 01 04 00 00 80 00 00 00 81 04 00 00 10 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 09 05 05 0b d0 00 00 00 80 80 80 0b 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 10 00 0f 34 00 00 00 00 91 02 0c 00 01 47 0c 00
0x90: a1 0c 1c 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 20 02 00 00 00 00 00 00 13 00 00 00 00 03 00 00
0xB0: 00 00 f0 00 00 00 00 00 55 55 55 55 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 33 22 11 00 67 45 00 00 c0 ff 00 00 00 00 00 00
0xE0: 09 00 0c 10 a8 00 24 00 00 00 00 00 00 00 00 00
0xF0: 01 c0 d1 fe 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Mass Storage (IDE)
Vendor ID = 8086h, Intel Corporation
Device ID = 27c0h, 82801GB/GR/GH (ICH7 Family) Serial ATA Storage Controller IDE
PCI index = 0h
Class Codes = 010180h
Revision ID = 1h
Bus number = 0
Device number = 31
Function num = 2
Status Reg = 2b0h
Command Reg = 5h
I/O space access enabled
Memory space access disabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI IO Address = 0h length 8 enabled
PCI IO Address = 0h length 4 enabled
PCI IO Address = 0h length 8 enabled
PCI IO Address = 0h length 4 enabled
PCI IO Address = d800h length 16 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27c0h
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT B
Interrupt line = 0
CPU Interrupt = 0h
Capabilities Pointer = 70h
Capability ID = 1h - Power Management
Capabilities = 4002h - 0h
Device Dependent Registers:
0x40: 07 a3 07 a3 00 00 00 00 05 00 01 02 00 00 00 00
0x50: 00 00 00 00 c4 10 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 02 00 1f 00 80 01 80 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 0d 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Serial Bus (SMBus)
Vendor ID = 8086h, Intel Corporation
Device ID = 27dah, 82801G (ICH7 Family) SMBus Controller
PCI index = 0h
Class Codes = 0c0500h
Revision ID = 1h
Bus number = 0
Device number = 31
Function num = 3
Status Reg = 280h
Command Reg = 1h
I/O space access enabled
Memory space access disabled
Bus Master disabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 0h
PCI IO Address = 500h length 32 enabled
Subsystem Vendor ID = 8086h
Subsystem ID = 27dah
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT B
Interrupt line = 11
CPU Interrupt = bh
Device Dependent Registers:
0x40: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xD0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xF0: 00 00 00 00 00 00 00 00 86 0f 01 00 00 00 00 00
Class = Network (Ethernet)
Vendor ID = 8086h, Intel Corporation
Device ID = 10d3h, Unknown Unknown
PCI index = 0h
Class Codes = 020000h
Revision ID = 0h
Bus number = 1
Device number = 0
Function num = 0
Status Reg = 10h
Command Reg = 7h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 10h un-cacheable
PCI Mem Address = fdbc0000h 32bit length 131072 enabled
PCI IO Address = 9c00h length 32 enabled
PCI Mem Address = fdbfc000h 32bit length 16384 enabled
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 9
CPU Interrupt = 9h
Capabilities Pointer = c8h
Capability ID = 1h - Power Management
Capabilities = c822h - f002000h
Capability ID = 5h - Message Signaled Interrupts
Capabilities = 80h - 0h
Capability ID = 10h - PCI Express
Capabilities = 1h - 8cc1h
Capability ID = 11h - MSI-X
Capabilities = 2h - 3h
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 11 00 02 00 03 00 00 00 03 20 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0f
0xD0: 05 e0 80 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 10 a0 01 00 c1 8c 00 00 10 28 19 00 11 1c 03 00
0xF0: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00
Class = Network (Ethernet)
Vendor ID = 8086h, Intel Corporation
Device ID = 10d3h, Unknown Unknown
PCI index = 1h
Class Codes = 020000h
Revision ID = 0h
Bus number = 2
Device number = 0
Function num = 0
Status Reg = 10h
Command Reg = 7h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response disabled
Data/Address stepping disabled
SERR# driver disabled
Fast back-to-back transactions to different agents disabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 10h un-cacheable
PCI Mem Address = fddc0000h 32bit length 131072 enabled
PCI IO Address = bc00h length 32 enabled
PCI Mem Address = fddfc000h 32bit length 16384 enabled
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 5
CPU Interrupt = 5h
Capabilities Pointer = c8h
Capability ID = 1h - Power Management
Capabilities = c822h - f002000h
Capability ID = 5h - Message Signaled Interrupts
Capabilities = 80h - 0h
Capability ID = 10h - PCI Express
Capabilities = 1h - 8cc1h
Capability ID = 11h - MSI-X
Capabilities = 2h - 3h
Device Dependent Registers:
0x40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xA0: 11 00 02 00 03 00 00 00 03 20 00 00 00 00 00 00
0xB0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0xC0: 00 00 00 00 00 00 00 00 01 d0 22 c8 00 20 00 0f
0xD0: 05 e0 80 00 00 00 00 00 00 00 00 00 00 00 00 00
0xE0: 10 a0 01 00 c1 8c 00 00 10 28 19 00 11 1c 03 00
0xF0: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00
This reminds me of a laptop I own. There’s a special keyboard sequence (Function-Key Display-Key) that toggles the video through three modes Lap-screen only, External Only, both. I’ll bet it is a function built into the chip. If you can get the specs you might figure out how to toggle it yourself into the mode you want. Sorry I can’t be more helpful than that.
thanks for your input, I know it woudn’t work but I would still like to try what you would do to make this work if pci -vv returned two VGA display. Thanks
This is how I used to do it for QNX 4. I don’t know if it works the same way for QNX 6.
There is a file: /etc/system/config/graphics-modes.
In the file are separate lines like this:
io-graphics -dbanshee vid=0x121a,did=0x5,index=0,photon,xres=1600,yres=1200,bitpp=32,refresh=60 -pphoton hwcursor ;
Take the two lines you want, one for each display and put them on the same line, using the index= parameter to specify a different pci-index.
io-graphics -dbanshee index=0 vid=0x121a,did=0x5,index=0,photon,xres=1600,yres=1200,bitpp=32,refresh=60 -pphoton hwcursor ; io-graphics -dbanshee index=1 vid=0x121a,did=0x5,index=0,photon,xres=1600,yres=1200,bitpp=32,refresh=60 -pphoton hwcursor ;
Of course this requires two video cards visible with “pci -vv” each at a different index.
Okay, I don’t think QNX 6.3.x or 6.5.x support dual display (dual head) with intel graphics chipset . I guess I’ll just have to go through the data sheet and figure it out my self.
Unless, someone has already done this?