finally tracked it down…
the HP z820 bios did not seem like it had an explicit way of disabling legacy usb2.0 SMI so i did it by mapping into the PMBASE register + offset for the SMI_EN control/status register (offset 0x30)
the legacy usb2.0 and software SMI timers were enabled in the register. disabling seemed to have resolved the issue.
pci_reg = lpc_if;
index = get_index(pci_reg, “PMBASE”);
pci_read_config32(info.BusNumber, info.DevFunc, pci_reg[index].offset, 1, (char*)&pmbase);
pmbase = pmbase & 0x0000ff80;
base = mmap(NULL,128,PROT_READ | PROT_WRITE, MAP_SHARED, NOFD, pmbase);
if(base == MAP_FAILED)
{
fprintf(stderr, “Error mapping to pmbase %s\n\n”, strerror(errno));
}
smi_en_reg = in32(pmbase + PMBASE_SMI_EN_OFF);
output_str = hex2bin(smi_en_reg, 32);
fprintf(stdout, “PMBASE: 0x%X SMIOFF: 0x%X SMI_EN_REG: 0x%X | %s\n”, pmbase, PMBASE_SMI_EN_OFF, smi_en_reg, output_str.c_str());
smi_en_reg = (0x01);
out32(pmbase + PMBASE_SMI_EN_OFF, smi_en_reg);
smi_en_reg = in32(pmbase + PMBASE_SMI_EN_OFF);
output_str = hex2bin(smi_en_reg, 32);
fprintf(stdout, "Updated PMBASE: 0x%X SMIOFF: 0x%X SMI_EN_REG: 0x%X | %s\n", pmbase, PMBASE_SMI_EN_OFF, smi_en_reg, output_str.c_str());
output from this snippet:
Attach Vendor 0x8086 - Device 0x1d41 - Index 0
Base 0 - PCI Address 0x0 - CPU Address 0x0 - Size 0x0
Base 1 - PCI Address 0x0 - CPU Address 0x0 - Size 0x0
Base 2 - PCI Address 0x0 - CPU Address 0x0 - Size 0x0
Base 3 - PCI Address 0x0 - CPU Address 0x0 - Size 0x0
Base 4 - PCI Address 0x0 - CPU Address 0x0 - Size 0x0
Base 5 - PCI Address 0x0 - CPU Address 0x0 - Size 0x0
Revision 0x5
*** SMI Control/status REGISTER ****
PMBASE: 0x400 SMIOFF: 0x30 SMI_EN_REG: 0x8020063 | 0000 1000 0000 0010 0000 0000 0110 0011
Updated PMBASE: 0x400 SMIOFF: 0x30 SMI_EN_REG: 0x8000003 | 0000 1000 0000 0000 0000 0000 0000 0011
BusNumber 0
DeviceNumber 31
FunctionNumber 0
OFFSET: 0x0 VID : 0x 8086 | 1000 0000 1000 0110
OFFSET: 0x2 DID : 0x 1D41 | 0001 1101 0100 0001
OFFSET: 0x4 PCICMD : 0x 7 | 0000 0000 0000 0111
OFFSET: 0x6 PSTS : 0x 210 | 0000 0010 0001 0000
OFFSET: 0x8 RID : 0x 5 | 0000 0101
OFFSET: 0x9 PI : 0x 0 | 0000 0000
OFFSET: 0xA SCC : 0x 1 | 0000 0001
OFFSET: 0xB BCC : 0x 6 | 0000 0110
OFFSET: 0xD PMLT : 0x 0 | 0000 0000
OFFSET: 0xE HEADTYP : 0x 80 | 1000 0000
OFFSET: 0x2C SS : 0x 103C | 0001 0000 0011 1100
OFFSET: 0x34 CAPP : 0x E0 | 1110 0000
OFFSET: 0x40 PMBASE : 0x 401 | 0000 0000 0000 0000 0000 0100 0000 0001
OFFSET: 0x44 ACPI_CNTL : 0x 80 | 1000 0000
OFFSET: 0x48 GPIOBASE : 0x 501 | 0000 0000 0000 0000 0000 0101 0000 0001
OFFSET: 0x4C GC : 0x 11 | 0001 0001
OFFSET: 0x60 PIRQ[A]_ROUT : 0x B | 0000 1011
OFFSET: 0x61 PIRQ[B]_ROUT : 0x 5 | 0000 0101
OFFSET: 0x62 PIRQ[C]_ROUT : 0x 4 | 0000 0100
OFFSET: 0x63 PIRQ[D]_ROUT : 0x 3 | 0000 0011
OFFSET: 0x64 SIRQ_CNTL : 0x D0 | 1101 0000
OFFSET: 0x68 PIRQ[E] ROUT : 0x 7 | 0000 0111
OFFSET: 0x69 PIRQ[F] ROUT : 0x 0 | 0000 0000
OFFSET: 0x6A PIRQ[G] ROUT : 0x 0 | 0000 0000
OFFSET: 0x6B PIRQ[H] ROUT : 0x A | 0000 1010
OFFSET: 0x6C LPC_IBDF : 0x F0F8 | 1111 0000 1111 1000
OFFSET: 0x70 LPC_H0BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x72 LPC_H1BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x74 LPC_H2BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x76 LPC_H3BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x78 LPC_H4BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x7A LPC_H5BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x7C LPC_H6BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x7E LPC_H7BDF : 0x F078 | 1111 0000 0111 1000
OFFSET: 0x80 LPC_I/O_DEC : 0x 10 | 0001 0000
OFFSET: 0x82 LPC_EN : 0x 3F0E | 0011 1111 0000 1110
OFFSET: 0x84 GEN1_DEC : 0x FC0601 | 0000 0000 1111 1100 0000 0110 0000 0001
OFFSET: 0x88 GEN2_DEC : 0x FC0801 | 0000 0000 1111 1100 0000 1000 0000 0001
OFFSET: 0x8C GEN3_DEC : 0x 0 | 0000 0000 0000 0000 0000 0000 0000 0000
OFFSET: 0x90 GEN4_DEC : 0x 0 | 0000 0000 0000 0000 0000 0000 0000 0000
OFFSET: 0x94 ULKMC : 0x F00 | 0000 0000 0000 0000 0000 1111 0000 0000
OFFSET: 0x98 LGMR : 0x 0 | 0000 0000 0000 0000 0000 0000 0000 0000
OFFSET: 0xA0 GEN_PMCON_1 : 0x A18 | 0000 1010 0001 1000
OFFSET: 0xA2 GEN_PMCON_2 : 0x 20 | 0010 0000
OFFSET: 0xA4 GEN_PMCON_3 : 0x 1C49 | 0001 1100 0100 1001
OFFSET: 0xA6 GEN_PMCON_LOCK : 0x 6 | 0000 0110
OFFSET: 0xA9 CIR4 : 0x 47 | 0100 0111
OFFSET: 0xAA BM_BREAK_EN_2 : 0x 0 | 0000 0000
OFFSET: 0xAB BM_BREAK_EN : 0x 0 | 0000 0000
OFFSET: 0xB8 GPI_ROUT : 0x 11000 | 0000 0000 0000 0001 0001 0000 0000 0000
OFFSET: 0xD0 BIOS_SEL1 : 0x 112233 | 0000 0000 0001 0001 0010 0010 0011 0011
OFFSET: 0xD4 BIOS_SEL2 : 0x 4567 | 0100 0101 0110 0111
OFFSET: 0xD8 BIOS_DEC_EN1 : 0x FFCF | 1111 1111 1100 1111
OFFSET: 0xDC BIOS_CNTL : 0x 2A | 0010 1010
OFFSET: 0xE0 FDCAP : 0x 9 | 0000 0000 0000 1001
OFFSET: 0xE2 FDLEN : 0x C | 0000 1100
OFFSET: 0xE3 FDVER : 0x 10 | 0001 0000
OFFSET: 0xE4 FDVECIDX : 0x 0 | 0000 0000 0000 0000 0000 0000 0000 0000
OFFSET: 0xE8 FVECD : 0x C640290 | 0000 1100 0110 0100 0000 0010 1001 0000
OFFSET: 0xF0 RCBA : 0xFED1C001 | 1111 1110 1101 0001 1100 0000 0000 0001
Enter Commands(x to exit or NAME HEXVALUE:
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